gpu: nvgpu: remove unused regops HALs

Below regops HALs are not being called from anywhere, so remove them
gops.regops.get_runcontrol_whitelist_ranges()
gops.regops.get_runcontrol_whitelist_ranges_count()
gops.regops.get_qctl_whitelist_ranges()
gops.regops.get_qctl_whitelist_ranges_count()

HAL gops.regops.apply_smpc_war() is unimplemented for all the chips, and it
was originally only needed for gk20a which is not unsupported
So remove this HAL and its call too

Jira NVGPU-620

Change-Id: Ia2c74883cd647a2e94ee740ffd040a40c442b939
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813106
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 40 deletions

diff --git a/drivers/gpu/nvgpu/gp106/regops_gp106.c b/drivers/gpu/nvgpu/gp106/regops_gp106.c
index 25b88eeb..581b280d 100644
--- a/drivers/gpu/nvgpu/gp106/regops_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/regops_gp106.c
@@ -23,12 +23,9 @@
  */
 
 #include "gk20a/gk20a.h"
-#include "gk20a/dbg_gpu_gk20a.h"
 #include "gk20a/regops_gk20a.h"
 #include "regops_gp106.h"
 
-#include <nvgpu/bsearch.h>
-
 static const struct regop_offset_range gp106_global_whitelist_ranges[] = {
         { 0x000004f0,   1},
         { 0x00001a00,   3},
@@ -1697,23 +1694,12 @@ static const u32 gp106_runcontrol_whitelist[] = {
 static const u64 gp106_runcontrol_whitelist_count =
         ARRAY_SIZE(gp106_runcontrol_whitelist);
 
-static const struct regop_offset_range gp106_runcontrol_whitelist_ranges[] = {
-};
-static const u64 gp106_runcontrol_whitelist_ranges_count =
-        ARRAY_SIZE(gp106_runcontrol_whitelist_ranges);
-
-
 /* quad ctl */
 static const u32 gp106_qctl_whitelist[] = {
 };
 static const u64 gp106_qctl_whitelist_count =
         ARRAY_SIZE(gp106_qctl_whitelist);
 
-static const struct regop_offset_range gp106_qctl_whitelist_ranges[] = {
-};
-static const u64 gp106_qctl_whitelist_ranges_count =
-        ARRAY_SIZE(gp106_qctl_whitelist_ranges);
-
 const struct regop_offset_range *gp106_get_global_whitelist_ranges(void)
 {
         return gp106_global_whitelist_ranges;
@@ -1744,16 +1730,6 @@ u64 gp106_get_runcontrol_whitelist_count(void)
         return gp106_runcontrol_whitelist_count;
 }
 
-const struct regop_offset_range *gp106_get_runcontrol_whitelist_ranges(void)
-{
-        return gp106_runcontrol_whitelist_ranges;
-}
-
-u64 gp106_get_runcontrol_whitelist_ranges_count(void)
-{
-        return gp106_runcontrol_whitelist_ranges_count;
-}
-
 const u32 *gp106_get_qctl_whitelist(void)
 {
         return gp106_qctl_whitelist;
@@ -1763,19 +1739,3 @@ u64 gp106_get_qctl_whitelist_count(void)
 {
         return gp106_qctl_whitelist_count;
 }
-
-const struct regop_offset_range *gp106_get_qctl_whitelist_ranges(void)
-{
-        return gp106_qctl_whitelist_ranges;
-}
-
-u64 gp106_get_qctl_whitelist_ranges_count(void)
-{
-        return gp106_qctl_whitelist_ranges_count;
-}
-
-int gp106_apply_smpc_war(struct dbg_session_gk20a *dbg_s)
-{
-        /* Not needed on gp106 */
-        return 0;
-}