gpu: nvgpu: PMU init sequence change

-Moved PMU RTOS init & start RTOS from acr_gm20b.c file pmu.c
 method nvgpu_init_pmu_support()
-Modified nvgpu_init_pmu_support() to init required interface
 for PMU RTOS & does start PMU RTOS in secure & non-secure
 based on NVGPU_SEC_PRIVSECURITY flag.
-Created secured_pmu_start ops under PMU ops to start PMU
 falcon in low secure mode.
-Updated PMU ops update_lspmu_cmdline_args, setup_apertures &
 secured_pmu_start assignment for gp106 & gv100 to support
 modified PMU init sequence.
-Removed duplicate PMU non-secure bootstrap code from multiple
 files & defined gm20b_ns_pmu_setup_hw_and_bootstrap()method
 to handle non secure PMU bootstrap, reused this method
 for need chips.

JIRA NVGPU-1146

Change-Id: I3957da2936b3c4ea0c985e67802c847c38de7c89
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1818099
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.h b/drivers/gpu/nvgpu/gp106/pmu_gp106.h
index 9cf1202e..c9392d7b 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.h
@@ -41,5 +41,7 @@ void gp106_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
                 struct pmu_pg_stats_data *pg_stat_data);
 bool gp106_pmu_is_engine_in_reset(struct gk20a *g);
 int gp106_pmu_engine_reset(struct gk20a *g, bool do_reset);
+void gp106_update_lspmu_cmdline_args(struct gk20a *g);
+void gp106_pmu_setup_apertures(struct gk20a *g);
 
 #endif /* NVGPU_PMU_GP106_H */