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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-09-12 17:51:40 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-27 18:05:25 -0400
commite3ae03e17abd452c157545234348692364b4b9f6 (patch)
tree121b3dcde56c87f9a1008ad4f5effbeb69cff945 /drivers/gpu/nvgpu/gp106/pmu_gp106.c
parent78e3d22da3c2513d425c8c2560468ce854a982dd (diff)
gpu: nvgpu: Add MC APIs for reset masks
Add API for querying reset mask corresponding to a unit. The reset masks need to be read from MC HW header, and we do not want all units to access Mc HW headers themselves. JIRA NVGPU-954 Change-Id: I49ebbd891569de634bfc71afcecc8cd2358805c0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1823384 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/pmu_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_gp106.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
index a95f05f0..d153c818 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
@@ -40,7 +40,6 @@
40#include "lpwr/rppg.h" 40#include "lpwr/rppg.h"
41 41
42#include <nvgpu/hw/gp106/hw_psec_gp106.h> 42#include <nvgpu/hw/gp106/hw_psec_gp106.h>
43#include <nvgpu/hw/gp106/hw_mc_gp106.h>
44#include <nvgpu/hw/gp106/hw_pwr_gp106.h> 43#include <nvgpu/hw/gp106/hw_pwr_gp106.h>
45 44
46bool gp106_is_pmu_supported(struct gk20a *g) 45bool gp106_is_pmu_supported(struct gk20a *g)