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authorSunny He <suhe@nvidia.com>2017-08-01 18:03:26 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-21 16:06:04 -0400
commitb50b379c192714d0d08c3f2d33e90c95cf795253 (patch)
treebd7786d1fec51f168a9393fcb16a8fe56ad25044 /drivers/gpu/nvgpu/gp106/pmu_gp106.c
parent192f1039e11893b9216819837eee871612225849 (diff)
gpu: nvgpu: Move non-fp pmu members from gpu_ops
Move non-function pointer members out of the pmu and pmu_ver substructs of gpu_ops. Ideally gpu_ops will have only function ponters, better matching its intended purpose and improving readability. - g.ops.pmu_ver.cmd_id_zbc_table_update has been changed to g.pmu_ver_cmd_id_zbc_table_update - g.ops.pmu.lspmuwprinitdone has been changed to g.pmu_lsf_pmu_wpr_init_done - g.ops.pmu.lsfloadedfalconid has been changed to g.pmu_lsf_loaded_falcon_id Boolean flags have been implemented using the enabled.h API - g.ops.pmu_ver.is_pmu_zbc_save_supported moved to common flag NVGPU_PMU_ZBC_SAVE - g.ops.pmu.fecsbootstrapdone moved to common flag NVGPU_PMU_FECS_BOOTSTRAP_DONE Jira NVGPU-74 Change-Id: I08fb20f8f382277f2c579f06d561914c000ea6e0 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530981 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/pmu_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_gp106.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
index a9fb794d..3b75b488 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
@@ -233,8 +233,8 @@ static void gp106_pmu_load_multiple_falcons(struct gk20a *g, u32 falconidmask,
233 233
234 gk20a_dbg_fn(""); 234 gk20a_dbg_fn("");
235 235
236 gp106_dbg_pmu("wprinit status = %x\n", g->ops.pmu.lspmuwprinitdone); 236 gp106_dbg_pmu("wprinit status = %x\n", g->pmu_lsf_pmu_wpr_init_done);
237 if (g->ops.pmu.lspmuwprinitdone) { 237 if (g->pmu_lsf_pmu_wpr_init_done) {
238 /* send message to load FECS falcon */ 238 /* send message to load FECS falcon */
239 memset(&cmd, 0, sizeof(struct pmu_cmd)); 239 memset(&cmd, 0, sizeof(struct pmu_cmd));
240 cmd.hdr.unit_id = PMU_UNIT_ACR; 240 cmd.hdr.unit_id = PMU_UNIT_ACR;
@@ -268,14 +268,14 @@ static int gp106_load_falcon_ucode(struct gk20a *g, u32 falconidmask)
268 if (falconidmask & ~((1 << LSF_FALCON_ID_FECS) | 268 if (falconidmask & ~((1 << LSF_FALCON_ID_FECS) |
269 (1 << LSF_FALCON_ID_GPCCS))) 269 (1 << LSF_FALCON_ID_GPCCS)))
270 return -EINVAL; 270 return -EINVAL;
271 g->ops.pmu.lsfloadedfalconid = 0; 271 g->pmu_lsf_loaded_falcon_id = 0;
272 /* check whether pmu is ready to bootstrap lsf if not wait for it */ 272 /* check whether pmu is ready to bootstrap lsf if not wait for it */
273 if (!g->ops.pmu.lspmuwprinitdone) { 273 if (!g->pmu_lsf_pmu_wpr_init_done) {
274 pmu_wait_message_cond(&g->pmu, 274 pmu_wait_message_cond(&g->pmu,
275 gk20a_get_gr_idle_timeout(g), 275 gk20a_get_gr_idle_timeout(g),
276 &g->ops.pmu.lspmuwprinitdone, 1); 276 &g->pmu_lsf_pmu_wpr_init_done, 1);
277 /* check again if it still not ready indicate an error */ 277 /* check again if it still not ready indicate an error */
278 if (!g->ops.pmu.lspmuwprinitdone) { 278 if (!g->pmu_lsf_pmu_wpr_init_done) {
279 nvgpu_err(g, "PMU not ready to load LSF"); 279 nvgpu_err(g, "PMU not ready to load LSF");
280 return -ETIMEDOUT; 280 return -ETIMEDOUT;
281 } 281 }
@@ -284,8 +284,8 @@ static int gp106_load_falcon_ucode(struct gk20a *g, u32 falconidmask)
284 gp106_pmu_load_multiple_falcons(g, falconidmask, flags); 284 gp106_pmu_load_multiple_falcons(g, falconidmask, flags);
285 pmu_wait_message_cond(&g->pmu, 285 pmu_wait_message_cond(&g->pmu,
286 gk20a_get_gr_idle_timeout(g), 286 gk20a_get_gr_idle_timeout(g),
287 &g->ops.pmu.lsfloadedfalconid, falconidmask); 287 &g->pmu_lsf_loaded_falcon_id, falconidmask);
288 if (g->ops.pmu.lsfloadedfalconid != falconidmask) 288 if (g->pmu_lsf_loaded_falcon_id != falconidmask)
289 return -ETIMEDOUT; 289 return -ETIMEDOUT;
290 return 0; 290 return 0;
291} 291}
@@ -318,8 +318,8 @@ void gp106_init_pmu_ops(struct gk20a *g)
318 gops->pmu.pmu_mutex_size = pwr_pmu_mutex__size_1_v; 318 gops->pmu.pmu_mutex_size = pwr_pmu_mutex__size_1_v;
319 gops->pmu.pmu_mutex_acquire = gk20a_pmu_mutex_acquire; 319 gops->pmu.pmu_mutex_acquire = gk20a_pmu_mutex_acquire;
320 gops->pmu.pmu_mutex_release = gk20a_pmu_mutex_release; 320 gops->pmu.pmu_mutex_release = gk20a_pmu_mutex_release;
321 gops->pmu.lspmuwprinitdone = 0; 321 g->pmu_lsf_pmu_wpr_init_done = 0;
322 gops->pmu.fecsbootstrapdone = false; 322 __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false);
323 gops->pmu.write_dmatrfbase = gp10b_write_dmatrfbase; 323 gops->pmu.write_dmatrfbase = gp10b_write_dmatrfbase;
324 gops->pmu.pmu_elpg_statistics = gp106_pmu_elpg_statistics; 324 gops->pmu.pmu_elpg_statistics = gp106_pmu_elpg_statistics;
325 gops->pmu.pmu_pg_init_param = gp106_pg_param_init; 325 gops->pmu.pmu_pg_init_param = gp106_pg_param_init;