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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-04-06 15:09:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-07 16:48:24 -0400
commit86ecddf68734e4a938eda351f4dde11ab507de3f (patch)
tree3a8d89ace77fc3427da6243c81f224883954e8e9 /drivers/gpu/nvgpu/gp106/pmu_gp106.c
parentbb72b7e2ed215b26e1d9b94534c24ab4cfa52801 (diff)
gpu: nvgpu: gp106: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I18955b4c46c082883ee0bf589ab17cd66ab0add2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1457346 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/pmu_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_gp106.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
index a2eef6ff..cadbd308 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
@@ -77,7 +77,7 @@ static int gp106_pmu_enable_hw(struct pmu_gk20a *pmu, bool enable)
77 gk20a_writel(g, pwr_falcon_engine_r(), 77 gk20a_writel(g, pwr_falcon_engine_r(),
78 pwr_falcon_engine_reset_true_f()); 78 pwr_falcon_engine_reset_true_f());
79 gk20a_readl(g, pwr_falcon_engine_r()); 79 gk20a_readl(g, pwr_falcon_engine_r());
80 gk20a_err(dev_from_gk20a(g), "Falcon mem scrubbing timeout"); 80 nvgpu_err(g, "Falcon mem scrubbing timeout");
81 return -ETIMEDOUT; 81 return -ETIMEDOUT;
82 } else { 82 } else {
83 /* DISBALE */ 83 /* DISBALE */
@@ -202,7 +202,7 @@ static void pmu_handle_param_msg(struct gk20a *g, struct pmu_msg *msg,
202 gk20a_dbg_fn(""); 202 gk20a_dbg_fn("");
203 203
204 if (status != 0) { 204 if (status != 0) {
205 gk20a_err(dev_from_gk20a(g), "PG PARAM cmd aborted"); 205 nvgpu_err(g, "PG PARAM cmd aborted");
206 return; 206 return;
207 } 207 }
208 208
@@ -222,7 +222,7 @@ static int gp106_pg_param_init(struct gk20a *g, u32 pg_engine_id)
222 222
223 status = init_rppg(g); 223 status = init_rppg(g);
224 if (status != 0) { 224 if (status != 0) {
225 gk20a_err(dev_from_gk20a(g), "RPPG init Failed"); 225 nvgpu_err(g, "RPPG init Failed");
226 return -1; 226 return -1;
227 } 227 }
228 228
@@ -386,8 +386,7 @@ static int gp106_load_falcon_ucode(struct gk20a *g, u32 falconidmask)
386 &g->ops.pmu.lspmuwprinitdone, 1); 386 &g->ops.pmu.lspmuwprinitdone, 1);
387 /* check again if it still not ready indicate an error */ 387 /* check again if it still not ready indicate an error */
388 if (!g->ops.pmu.lspmuwprinitdone) { 388 if (!g->ops.pmu.lspmuwprinitdone) {
389 gk20a_err(dev_from_gk20a(g), 389 nvgpu_err(g, "PMU not ready to load LSF");
390 "PMU not ready to load LSF");
391 return -ETIMEDOUT; 390 return -ETIMEDOUT;
392 } 391 }
393 } 392 }