gpu: nvgpu: gp106: Use new delay APIs

Use platform agnostic delay functions instead of Linux kernel APIs.
This allows removing dependency to Linux header linux/delay.h. At the
same time remove #include lines for other unused Linux headers.

JIRA NVGPU-16

Change-Id: I54db15d9abf578ec334b100635baec214fe22af5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460116
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>

1 files changed, 4 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
index 308bcf04..e0114979 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
@@ -11,8 +11,6 @@
  * more details.
  */
 
-#include <linux/delay.h>        /* for udelay */
-
 #include "gk20a/gk20a.h"
 #include "gk20a/pmu_gk20a.h"
 
@@ -70,7 +68,7 @@ static int gp106_pmu_enable_hw(struct pmu_gk20a *pmu, bool enable)
                                 gk20a_dbg_fn("done");
                                 return 0;
                         }
-                        udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT);
+                        nvgpu_udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT);
                 } while (--retries);
 
                 /* If scrubbing timeout, keep PMU in reset state */
@@ -103,7 +101,7 @@ static int pmu_enable(struct pmu_gk20a *pmu, bool enable)
 
                         pmu_enable_irq(pmu, false);
                         gp106_pmu_enable_hw(pmu, false);
-                        udelay(10);
+                        nvgpu_udelay(10);
                 }
         } else {
                 gp106_pmu_enable_hw(pmu, true);
@@ -113,7 +111,7 @@ static int pmu_enable(struct pmu_gk20a *pmu, bool enable)
                 err = pmu_idle(pmu);
                 if (err)
                         return err;
-                udelay(5);
+                nvgpu_udelay(5);
                 pmu_enable_irq(pmu, true);
         }
 
@@ -155,7 +153,7 @@ static int gp106_sec2_reset(struct gk20a *g)
         //sec2 reset
         gk20a_writel(g, psec_falcon_engine_r(),
                         pwr_falcon_engine_reset_true_f());
-        udelay(10);
+        nvgpu_udelay(10);
         gk20a_writel(g, psec_falcon_engine_r(),
                         pwr_falcon_engine_reset_false_f());