gpu: nvgpu: gp106: Fix MISRA 15.6 violations

MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces, introducing the braces.

JIRA NVGPU-671

Change-Id: I8493274995ed8de526902dd0ca0808b2972e28aa
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1796806
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gp106/mm_gp106.c b/drivers/gpu/nvgpu/gp106/mm_gp106.c
index 4a3a4a19..7864880f 100644
--- a/drivers/gpu/nvgpu/gp106/mm_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/mm_gp106.c
@@ -39,8 +39,9 @@ size_t gp106_mm_get_vidmem_size(struct gk20a *g)
         u32 ecc = fb_mmu_local_memory_range_ecc_mode_v(range);
         size_t bytes = ((size_t)mag << scale) * SZ_1M;
 
-        if (ecc)
+        if (ecc) {
                 bytes = bytes / 16 * 15;
+        }
 
         return bytes;
 }