diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-03-23 11:41:04 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:16 -0500 |
commit | 3d0f9a751784ac9eb27f9f989f3b584ff5dc8f17 (patch) | |
tree | 4c1df46e81b17f47ddc8731beb95c7f351de7788 /drivers/gpu/nvgpu/gp106/hw_gmmu_gp106.h | |
parent | 21eda905ea69a0e090f6e29c444a9129c65f0b1f (diff) |
gpu: nvgpu: Add support for gp104 and gp106
Add support for chips gp104 and gp106.
Change-Id: Ied5f239bdd0ec85245bce1fb6ef51330871d0f05
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120465
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ken Adams <kadams@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hw_gmmu_gp106.h')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hw_gmmu_gp106.h | 1261 |
1 files changed, 1261 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hw_gmmu_gp106.h b/drivers/gpu/nvgpu/gp106/hw_gmmu_gp106.h new file mode 100644 index 00000000..96ab77df --- /dev/null +++ b/drivers/gpu/nvgpu/gp106/hw_gmmu_gp106.h | |||
@@ -0,0 +1,1261 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | /* | ||
17 | * Function naming determines intended use: | ||
18 | * | ||
19 | * <x>_r(void) : Returns the offset for register <x>. | ||
20 | * | ||
21 | * <x>_o(void) : Returns the offset for element <x>. | ||
22 | * | ||
23 | * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. | ||
24 | * | ||
25 | * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. | ||
26 | * | ||
27 | * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted | ||
28 | * and masked to place it at field <y> of register <x>. This value | ||
29 | * can be |'d with others to produce a full register value for | ||
30 | * register <x>. | ||
31 | * | ||
32 | * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This | ||
33 | * value can be ~'d and then &'d to clear the value of field <y> for | ||
34 | * register <x>. | ||
35 | * | ||
36 | * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted | ||
37 | * to place it at field <y> of register <x>. This value can be |'d | ||
38 | * with others to produce a full register value for <x>. | ||
39 | * | ||
40 | * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register | ||
41 | * <x> value 'r' after being shifted to place its LSB at bit 0. | ||
42 | * This value is suitable for direct comparison with other unshifted | ||
43 | * values appropriate for use in field <y> of register <x>. | ||
44 | * | ||
45 | * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for | ||
46 | * field <y> of register <x>. This value is suitable for direct | ||
47 | * comparison with unshifted values appropriate for use in field <y> | ||
48 | * of register <x>. | ||
49 | */ | ||
50 | #ifndef _hw_gmmu_gp106_h_ | ||
51 | #define _hw_gmmu_gp106_h_ | ||
52 | |||
53 | static inline u32 gmmu_new_pde_is_pte_w(void) | ||
54 | { | ||
55 | return 0; | ||
56 | } | ||
57 | static inline u32 gmmu_new_pde_is_pte_false_f(void) | ||
58 | { | ||
59 | return 0x0; | ||
60 | } | ||
61 | static inline u32 gmmu_new_pde_aperture_w(void) | ||
62 | { | ||
63 | return 0; | ||
64 | } | ||
65 | static inline u32 gmmu_new_pde_aperture_invalid_f(void) | ||
66 | { | ||
67 | return 0x0; | ||
68 | } | ||
69 | static inline u32 gmmu_new_pde_aperture_video_memory_f(void) | ||
70 | { | ||
71 | return 0x2; | ||
72 | } | ||
73 | static inline u32 gmmu_new_pde_aperture_sys_mem_coh_f(void) | ||
74 | { | ||
75 | return 0x4; | ||
76 | } | ||
77 | static inline u32 gmmu_new_pde_aperture_sys_mem_ncoh_f(void) | ||
78 | { | ||
79 | return 0x6; | ||
80 | } | ||
81 | static inline u32 gmmu_new_pde_address_sys_f(u32 v) | ||
82 | { | ||
83 | return (v & 0xffffff) << 8; | ||
84 | } | ||
85 | static inline u32 gmmu_new_pde_address_sys_w(void) | ||
86 | { | ||
87 | return 0; | ||
88 | } | ||
89 | static inline u32 gmmu_new_pde_vol_w(void) | ||
90 | { | ||
91 | return 0; | ||
92 | } | ||
93 | static inline u32 gmmu_new_pde_vol_true_f(void) | ||
94 | { | ||
95 | return 0x8; | ||
96 | } | ||
97 | static inline u32 gmmu_new_pde_vol_false_f(void) | ||
98 | { | ||
99 | return 0x0; | ||
100 | } | ||
101 | static inline u32 gmmu_new_pde_address_shift_v(void) | ||
102 | { | ||
103 | return 0x0000000c; | ||
104 | } | ||
105 | static inline u32 gmmu_new_pde__size_v(void) | ||
106 | { | ||
107 | return 0x00000008; | ||
108 | } | ||
109 | static inline u32 gmmu_new_dual_pde_is_pte_w(void) | ||
110 | { | ||
111 | return 0; | ||
112 | } | ||
113 | static inline u32 gmmu_new_dual_pde_is_pte_false_f(void) | ||
114 | { | ||
115 | return 0x0; | ||
116 | } | ||
117 | static inline u32 gmmu_new_dual_pde_aperture_big_w(void) | ||
118 | { | ||
119 | return 0; | ||
120 | } | ||
121 | static inline u32 gmmu_new_dual_pde_aperture_big_invalid_f(void) | ||
122 | { | ||
123 | return 0x0; | ||
124 | } | ||
125 | static inline u32 gmmu_new_dual_pde_aperture_big_video_memory_f(void) | ||
126 | { | ||
127 | return 0x2; | ||
128 | } | ||
129 | static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_coh_f(void) | ||
130 | { | ||
131 | return 0x4; | ||
132 | } | ||
133 | static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f(void) | ||
134 | { | ||
135 | return 0x6; | ||
136 | } | ||
137 | static inline u32 gmmu_new_dual_pde_address_big_sys_f(u32 v) | ||
138 | { | ||
139 | return (v & 0xfffffff) << 4; | ||
140 | } | ||
141 | static inline u32 gmmu_new_dual_pde_address_big_sys_w(void) | ||
142 | { | ||
143 | return 0; | ||
144 | } | ||
145 | static inline u32 gmmu_new_dual_pde_aperture_small_w(void) | ||
146 | { | ||
147 | return 2; | ||
148 | } | ||
149 | static inline u32 gmmu_new_dual_pde_aperture_small_invalid_f(void) | ||
150 | { | ||
151 | return 0x0; | ||
152 | } | ||
153 | static inline u32 gmmu_new_dual_pde_aperture_small_video_memory_f(void) | ||
154 | { | ||
155 | return 0x2; | ||
156 | } | ||
157 | static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_coh_f(void) | ||
158 | { | ||
159 | return 0x4; | ||
160 | } | ||
161 | static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f(void) | ||
162 | { | ||
163 | return 0x6; | ||
164 | } | ||
165 | static inline u32 gmmu_new_dual_pde_vol_small_w(void) | ||
166 | { | ||
167 | return 2; | ||
168 | } | ||
169 | static inline u32 gmmu_new_dual_pde_vol_small_true_f(void) | ||
170 | { | ||
171 | return 0x8; | ||
172 | } | ||
173 | static inline u32 gmmu_new_dual_pde_vol_small_false_f(void) | ||
174 | { | ||
175 | return 0x0; | ||
176 | } | ||
177 | static inline u32 gmmu_new_dual_pde_vol_big_w(void) | ||
178 | { | ||
179 | return 0; | ||
180 | } | ||
181 | static inline u32 gmmu_new_dual_pde_vol_big_true_f(void) | ||
182 | { | ||
183 | return 0x8; | ||
184 | } | ||
185 | static inline u32 gmmu_new_dual_pde_vol_big_false_f(void) | ||
186 | { | ||
187 | return 0x0; | ||
188 | } | ||
189 | static inline u32 gmmu_new_dual_pde_address_small_sys_f(u32 v) | ||
190 | { | ||
191 | return (v & 0xffffff) << 8; | ||
192 | } | ||
193 | static inline u32 gmmu_new_dual_pde_address_small_sys_w(void) | ||
194 | { | ||
195 | return 2; | ||
196 | } | ||
197 | static inline u32 gmmu_new_dual_pde_address_shift_v(void) | ||
198 | { | ||
199 | return 0x0000000c; | ||
200 | } | ||
201 | static inline u32 gmmu_new_dual_pde_address_big_shift_v(void) | ||
202 | { | ||
203 | return 0x00000008; | ||
204 | } | ||
205 | static inline u32 gmmu_new_dual_pde__size_v(void) | ||
206 | { | ||
207 | return 0x00000010; | ||
208 | } | ||
209 | static inline u32 gmmu_new_pte__size_v(void) | ||
210 | { | ||
211 | return 0x00000008; | ||
212 | } | ||
213 | static inline u32 gmmu_new_pte_valid_w(void) | ||
214 | { | ||
215 | return 0; | ||
216 | } | ||
217 | static inline u32 gmmu_new_pte_valid_true_f(void) | ||
218 | { | ||
219 | return 0x1; | ||
220 | } | ||
221 | static inline u32 gmmu_new_pte_valid_false_f(void) | ||
222 | { | ||
223 | return 0x0; | ||
224 | } | ||
225 | static inline u32 gmmu_new_pte_privilege_w(void) | ||
226 | { | ||
227 | return 0; | ||
228 | } | ||
229 | static inline u32 gmmu_new_pte_privilege_true_f(void) | ||
230 | { | ||
231 | return 0x20; | ||
232 | } | ||
233 | static inline u32 gmmu_new_pte_privilege_false_f(void) | ||
234 | { | ||
235 | return 0x0; | ||
236 | } | ||
237 | static inline u32 gmmu_new_pte_address_sys_f(u32 v) | ||
238 | { | ||
239 | return (v & 0xffffff) << 8; | ||
240 | } | ||
241 | static inline u32 gmmu_new_pte_address_sys_w(void) | ||
242 | { | ||
243 | return 0; | ||
244 | } | ||
245 | static inline u32 gmmu_new_pte_vol_w(void) | ||
246 | { | ||
247 | return 0; | ||
248 | } | ||
249 | static inline u32 gmmu_new_pte_vol_true_f(void) | ||
250 | { | ||
251 | return 0x8; | ||
252 | } | ||
253 | static inline u32 gmmu_new_pte_vol_false_f(void) | ||
254 | { | ||
255 | return 0x0; | ||
256 | } | ||
257 | static inline u32 gmmu_new_pte_aperture_w(void) | ||
258 | { | ||
259 | return 0; | ||
260 | } | ||
261 | static inline u32 gmmu_new_pte_aperture_video_memory_f(void) | ||
262 | { | ||
263 | return 0x0; | ||
264 | } | ||
265 | static inline u32 gmmu_new_pte_aperture_sys_mem_coh_f(void) | ||
266 | { | ||
267 | return 0x4; | ||
268 | } | ||
269 | static inline u32 gmmu_new_pte_aperture_sys_mem_ncoh_f(void) | ||
270 | { | ||
271 | return 0x6; | ||
272 | } | ||
273 | static inline u32 gmmu_new_pte_read_only_w(void) | ||
274 | { | ||
275 | return 0; | ||
276 | } | ||
277 | static inline u32 gmmu_new_pte_read_only_true_f(void) | ||
278 | { | ||
279 | return 0x40; | ||
280 | } | ||
281 | static inline u32 gmmu_new_pte_comptagline_f(u32 v) | ||
282 | { | ||
283 | return (v & 0x3ffff) << 4; | ||
284 | } | ||
285 | static inline u32 gmmu_new_pte_comptagline_w(void) | ||
286 | { | ||
287 | return 1; | ||
288 | } | ||
289 | static inline u32 gmmu_new_pte_kind_f(u32 v) | ||
290 | { | ||
291 | return (v & 0xff) << 24; | ||
292 | } | ||
293 | static inline u32 gmmu_new_pte_kind_w(void) | ||
294 | { | ||
295 | return 1; | ||
296 | } | ||
297 | static inline u32 gmmu_new_pte_address_shift_v(void) | ||
298 | { | ||
299 | return 0x0000000c; | ||
300 | } | ||
301 | static inline u32 gmmu_pte_kind_f(u32 v) | ||
302 | { | ||
303 | return (v & 0xff) << 4; | ||
304 | } | ||
305 | static inline u32 gmmu_pte_kind_w(void) | ||
306 | { | ||
307 | return 1; | ||
308 | } | ||
309 | static inline u32 gmmu_pte_kind_invalid_v(void) | ||
310 | { | ||
311 | return 0x000000ff; | ||
312 | } | ||
313 | static inline u32 gmmu_pte_kind_pitch_v(void) | ||
314 | { | ||
315 | return 0x00000000; | ||
316 | } | ||
317 | static inline u32 gmmu_pte_kind_z16_v(void) | ||
318 | { | ||
319 | return 0x00000001; | ||
320 | } | ||
321 | static inline u32 gmmu_pte_kind_z16_2c_v(void) | ||
322 | { | ||
323 | return 0x00000002; | ||
324 | } | ||
325 | static inline u32 gmmu_pte_kind_z16_ms2_2c_v(void) | ||
326 | { | ||
327 | return 0x00000003; | ||
328 | } | ||
329 | static inline u32 gmmu_pte_kind_z16_ms4_2c_v(void) | ||
330 | { | ||
331 | return 0x00000004; | ||
332 | } | ||
333 | static inline u32 gmmu_pte_kind_z16_ms8_2c_v(void) | ||
334 | { | ||
335 | return 0x00000005; | ||
336 | } | ||
337 | static inline u32 gmmu_pte_kind_z16_ms16_2c_v(void) | ||
338 | { | ||
339 | return 0x00000006; | ||
340 | } | ||
341 | static inline u32 gmmu_pte_kind_z16_2z_v(void) | ||
342 | { | ||
343 | return 0x00000007; | ||
344 | } | ||
345 | static inline u32 gmmu_pte_kind_z16_ms2_2z_v(void) | ||
346 | { | ||
347 | return 0x00000008; | ||
348 | } | ||
349 | static inline u32 gmmu_pte_kind_z16_ms4_2z_v(void) | ||
350 | { | ||
351 | return 0x00000009; | ||
352 | } | ||
353 | static inline u32 gmmu_pte_kind_z16_ms8_2z_v(void) | ||
354 | { | ||
355 | return 0x0000000a; | ||
356 | } | ||
357 | static inline u32 gmmu_pte_kind_z16_ms16_2z_v(void) | ||
358 | { | ||
359 | return 0x0000000b; | ||
360 | } | ||
361 | static inline u32 gmmu_pte_kind_z16_2cz_v(void) | ||
362 | { | ||
363 | return 0x00000036; | ||
364 | } | ||
365 | static inline u32 gmmu_pte_kind_z16_ms2_2cz_v(void) | ||
366 | { | ||
367 | return 0x00000037; | ||
368 | } | ||
369 | static inline u32 gmmu_pte_kind_z16_ms4_2cz_v(void) | ||
370 | { | ||
371 | return 0x00000038; | ||
372 | } | ||
373 | static inline u32 gmmu_pte_kind_z16_ms8_2cz_v(void) | ||
374 | { | ||
375 | return 0x00000039; | ||
376 | } | ||
377 | static inline u32 gmmu_pte_kind_z16_ms16_2cz_v(void) | ||
378 | { | ||
379 | return 0x0000005f; | ||
380 | } | ||
381 | static inline u32 gmmu_pte_kind_z16_4cz_v(void) | ||
382 | { | ||
383 | return 0x0000000c; | ||
384 | } | ||
385 | static inline u32 gmmu_pte_kind_z16_ms2_4cz_v(void) | ||
386 | { | ||
387 | return 0x0000000d; | ||
388 | } | ||
389 | static inline u32 gmmu_pte_kind_z16_ms4_4cz_v(void) | ||
390 | { | ||
391 | return 0x0000000e; | ||
392 | } | ||
393 | static inline u32 gmmu_pte_kind_z16_ms8_4cz_v(void) | ||
394 | { | ||
395 | return 0x0000000f; | ||
396 | } | ||
397 | static inline u32 gmmu_pte_kind_z16_ms16_4cz_v(void) | ||
398 | { | ||
399 | return 0x00000010; | ||
400 | } | ||
401 | static inline u32 gmmu_pte_kind_s8z24_v(void) | ||
402 | { | ||
403 | return 0x00000011; | ||
404 | } | ||
405 | static inline u32 gmmu_pte_kind_s8z24_1z_v(void) | ||
406 | { | ||
407 | return 0x00000012; | ||
408 | } | ||
409 | static inline u32 gmmu_pte_kind_s8z24_ms2_1z_v(void) | ||
410 | { | ||
411 | return 0x00000013; | ||
412 | } | ||
413 | static inline u32 gmmu_pte_kind_s8z24_ms4_1z_v(void) | ||
414 | { | ||
415 | return 0x00000014; | ||
416 | } | ||
417 | static inline u32 gmmu_pte_kind_s8z24_ms8_1z_v(void) | ||
418 | { | ||
419 | return 0x00000015; | ||
420 | } | ||
421 | static inline u32 gmmu_pte_kind_s8z24_ms16_1z_v(void) | ||
422 | { | ||
423 | return 0x00000016; | ||
424 | } | ||
425 | static inline u32 gmmu_pte_kind_s8z24_2cz_v(void) | ||
426 | { | ||
427 | return 0x00000017; | ||
428 | } | ||
429 | static inline u32 gmmu_pte_kind_s8z24_ms2_2cz_v(void) | ||
430 | { | ||
431 | return 0x00000018; | ||
432 | } | ||
433 | static inline u32 gmmu_pte_kind_s8z24_ms4_2cz_v(void) | ||
434 | { | ||
435 | return 0x00000019; | ||
436 | } | ||
437 | static inline u32 gmmu_pte_kind_s8z24_ms8_2cz_v(void) | ||
438 | { | ||
439 | return 0x0000001a; | ||
440 | } | ||
441 | static inline u32 gmmu_pte_kind_s8z24_ms16_2cz_v(void) | ||
442 | { | ||
443 | return 0x0000001b; | ||
444 | } | ||
445 | static inline u32 gmmu_pte_kind_s8z24_2cs_v(void) | ||
446 | { | ||
447 | return 0x0000001c; | ||
448 | } | ||
449 | static inline u32 gmmu_pte_kind_s8z24_ms2_2cs_v(void) | ||
450 | { | ||
451 | return 0x0000001d; | ||
452 | } | ||
453 | static inline u32 gmmu_pte_kind_s8z24_ms4_2cs_v(void) | ||
454 | { | ||
455 | return 0x0000001e; | ||
456 | } | ||
457 | static inline u32 gmmu_pte_kind_s8z24_ms8_2cs_v(void) | ||
458 | { | ||
459 | return 0x0000001f; | ||
460 | } | ||
461 | static inline u32 gmmu_pte_kind_s8z24_ms16_2cs_v(void) | ||
462 | { | ||
463 | return 0x00000020; | ||
464 | } | ||
465 | static inline u32 gmmu_pte_kind_s8z24_4cszv_v(void) | ||
466 | { | ||
467 | return 0x00000021; | ||
468 | } | ||
469 | static inline u32 gmmu_pte_kind_s8z24_ms2_4cszv_v(void) | ||
470 | { | ||
471 | return 0x00000022; | ||
472 | } | ||
473 | static inline u32 gmmu_pte_kind_s8z24_ms4_4cszv_v(void) | ||
474 | { | ||
475 | return 0x00000023; | ||
476 | } | ||
477 | static inline u32 gmmu_pte_kind_s8z24_ms8_4cszv_v(void) | ||
478 | { | ||
479 | return 0x00000024; | ||
480 | } | ||
481 | static inline u32 gmmu_pte_kind_s8z24_ms16_4cszv_v(void) | ||
482 | { | ||
483 | return 0x00000025; | ||
484 | } | ||
485 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_v(void) | ||
486 | { | ||
487 | return 0x00000026; | ||
488 | } | ||
489 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_v(void) | ||
490 | { | ||
491 | return 0x00000027; | ||
492 | } | ||
493 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_v(void) | ||
494 | { | ||
495 | return 0x00000028; | ||
496 | } | ||
497 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_v(void) | ||
498 | { | ||
499 | return 0x00000029; | ||
500 | } | ||
501 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_1zv_v(void) | ||
502 | { | ||
503 | return 0x0000002e; | ||
504 | } | ||
505 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_1zv_v(void) | ||
506 | { | ||
507 | return 0x0000002f; | ||
508 | } | ||
509 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_1zv_v(void) | ||
510 | { | ||
511 | return 0x00000030; | ||
512 | } | ||
513 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_1zv_v(void) | ||
514 | { | ||
515 | return 0x00000031; | ||
516 | } | ||
517 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2cs_v(void) | ||
518 | { | ||
519 | return 0x00000032; | ||
520 | } | ||
521 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2cs_v(void) | ||
522 | { | ||
523 | return 0x00000033; | ||
524 | } | ||
525 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2cs_v(void) | ||
526 | { | ||
527 | return 0x00000034; | ||
528 | } | ||
529 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2cs_v(void) | ||
530 | { | ||
531 | return 0x00000035; | ||
532 | } | ||
533 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2czv_v(void) | ||
534 | { | ||
535 | return 0x0000003a; | ||
536 | } | ||
537 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2czv_v(void) | ||
538 | { | ||
539 | return 0x0000003b; | ||
540 | } | ||
541 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2czv_v(void) | ||
542 | { | ||
543 | return 0x0000003c; | ||
544 | } | ||
545 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2czv_v(void) | ||
546 | { | ||
547 | return 0x0000003d; | ||
548 | } | ||
549 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2zv_v(void) | ||
550 | { | ||
551 | return 0x0000003e; | ||
552 | } | ||
553 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2zv_v(void) | ||
554 | { | ||
555 | return 0x0000003f; | ||
556 | } | ||
557 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2zv_v(void) | ||
558 | { | ||
559 | return 0x00000040; | ||
560 | } | ||
561 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2zv_v(void) | ||
562 | { | ||
563 | return 0x00000041; | ||
564 | } | ||
565 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_4cszv_v(void) | ||
566 | { | ||
567 | return 0x00000042; | ||
568 | } | ||
569 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_4cszv_v(void) | ||
570 | { | ||
571 | return 0x00000043; | ||
572 | } | ||
573 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_4cszv_v(void) | ||
574 | { | ||
575 | return 0x00000044; | ||
576 | } | ||
577 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_4cszv_v(void) | ||
578 | { | ||
579 | return 0x00000045; | ||
580 | } | ||
581 | static inline u32 gmmu_pte_kind_z24s8_v(void) | ||
582 | { | ||
583 | return 0x00000046; | ||
584 | } | ||
585 | static inline u32 gmmu_pte_kind_z24s8_1z_v(void) | ||
586 | { | ||
587 | return 0x00000047; | ||
588 | } | ||
589 | static inline u32 gmmu_pte_kind_z24s8_ms2_1z_v(void) | ||
590 | { | ||
591 | return 0x00000048; | ||
592 | } | ||
593 | static inline u32 gmmu_pte_kind_z24s8_ms4_1z_v(void) | ||
594 | { | ||
595 | return 0x00000049; | ||
596 | } | ||
597 | static inline u32 gmmu_pte_kind_z24s8_ms8_1z_v(void) | ||
598 | { | ||
599 | return 0x0000004a; | ||
600 | } | ||
601 | static inline u32 gmmu_pte_kind_z24s8_ms16_1z_v(void) | ||
602 | { | ||
603 | return 0x0000004b; | ||
604 | } | ||
605 | static inline u32 gmmu_pte_kind_z24s8_2cs_v(void) | ||
606 | { | ||
607 | return 0x0000004c; | ||
608 | } | ||
609 | static inline u32 gmmu_pte_kind_z24s8_ms2_2cs_v(void) | ||
610 | { | ||
611 | return 0x0000004d; | ||
612 | } | ||
613 | static inline u32 gmmu_pte_kind_z24s8_ms4_2cs_v(void) | ||
614 | { | ||
615 | return 0x0000004e; | ||
616 | } | ||
617 | static inline u32 gmmu_pte_kind_z24s8_ms8_2cs_v(void) | ||
618 | { | ||
619 | return 0x0000004f; | ||
620 | } | ||
621 | static inline u32 gmmu_pte_kind_z24s8_ms16_2cs_v(void) | ||
622 | { | ||
623 | return 0x00000050; | ||
624 | } | ||
625 | static inline u32 gmmu_pte_kind_z24s8_2cz_v(void) | ||
626 | { | ||
627 | return 0x00000051; | ||
628 | } | ||
629 | static inline u32 gmmu_pte_kind_z24s8_ms2_2cz_v(void) | ||
630 | { | ||
631 | return 0x00000052; | ||
632 | } | ||
633 | static inline u32 gmmu_pte_kind_z24s8_ms4_2cz_v(void) | ||
634 | { | ||
635 | return 0x00000053; | ||
636 | } | ||
637 | static inline u32 gmmu_pte_kind_z24s8_ms8_2cz_v(void) | ||
638 | { | ||
639 | return 0x00000054; | ||
640 | } | ||
641 | static inline u32 gmmu_pte_kind_z24s8_ms16_2cz_v(void) | ||
642 | { | ||
643 | return 0x00000055; | ||
644 | } | ||
645 | static inline u32 gmmu_pte_kind_z24s8_4cszv_v(void) | ||
646 | { | ||
647 | return 0x00000056; | ||
648 | } | ||
649 | static inline u32 gmmu_pte_kind_z24s8_ms2_4cszv_v(void) | ||
650 | { | ||
651 | return 0x00000057; | ||
652 | } | ||
653 | static inline u32 gmmu_pte_kind_z24s8_ms4_4cszv_v(void) | ||
654 | { | ||
655 | return 0x00000058; | ||
656 | } | ||
657 | static inline u32 gmmu_pte_kind_z24s8_ms8_4cszv_v(void) | ||
658 | { | ||
659 | return 0x00000059; | ||
660 | } | ||
661 | static inline u32 gmmu_pte_kind_z24s8_ms16_4cszv_v(void) | ||
662 | { | ||
663 | return 0x0000005a; | ||
664 | } | ||
665 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_v(void) | ||
666 | { | ||
667 | return 0x0000005b; | ||
668 | } | ||
669 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_v(void) | ||
670 | { | ||
671 | return 0x0000005c; | ||
672 | } | ||
673 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_v(void) | ||
674 | { | ||
675 | return 0x0000005d; | ||
676 | } | ||
677 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_v(void) | ||
678 | { | ||
679 | return 0x0000005e; | ||
680 | } | ||
681 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_1zv_v(void) | ||
682 | { | ||
683 | return 0x00000063; | ||
684 | } | ||
685 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_1zv_v(void) | ||
686 | { | ||
687 | return 0x00000064; | ||
688 | } | ||
689 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_1zv_v(void) | ||
690 | { | ||
691 | return 0x00000065; | ||
692 | } | ||
693 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_1zv_v(void) | ||
694 | { | ||
695 | return 0x00000066; | ||
696 | } | ||
697 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2cs_v(void) | ||
698 | { | ||
699 | return 0x00000067; | ||
700 | } | ||
701 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2cs_v(void) | ||
702 | { | ||
703 | return 0x00000068; | ||
704 | } | ||
705 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2cs_v(void) | ||
706 | { | ||
707 | return 0x00000069; | ||
708 | } | ||
709 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2cs_v(void) | ||
710 | { | ||
711 | return 0x0000006a; | ||
712 | } | ||
713 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2czv_v(void) | ||
714 | { | ||
715 | return 0x0000006f; | ||
716 | } | ||
717 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2czv_v(void) | ||
718 | { | ||
719 | return 0x00000070; | ||
720 | } | ||
721 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2czv_v(void) | ||
722 | { | ||
723 | return 0x00000071; | ||
724 | } | ||
725 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2czv_v(void) | ||
726 | { | ||
727 | return 0x00000072; | ||
728 | } | ||
729 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2zv_v(void) | ||
730 | { | ||
731 | return 0x00000073; | ||
732 | } | ||
733 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2zv_v(void) | ||
734 | { | ||
735 | return 0x00000074; | ||
736 | } | ||
737 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2zv_v(void) | ||
738 | { | ||
739 | return 0x00000075; | ||
740 | } | ||
741 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2zv_v(void) | ||
742 | { | ||
743 | return 0x00000076; | ||
744 | } | ||
745 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_4cszv_v(void) | ||
746 | { | ||
747 | return 0x00000077; | ||
748 | } | ||
749 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_4cszv_v(void) | ||
750 | { | ||
751 | return 0x00000078; | ||
752 | } | ||
753 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_4cszv_v(void) | ||
754 | { | ||
755 | return 0x00000079; | ||
756 | } | ||
757 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_4cszv_v(void) | ||
758 | { | ||
759 | return 0x0000007a; | ||
760 | } | ||
761 | static inline u32 gmmu_pte_kind_zf32_v(void) | ||
762 | { | ||
763 | return 0x0000007b; | ||
764 | } | ||
765 | static inline u32 gmmu_pte_kind_zf32_1z_v(void) | ||
766 | { | ||
767 | return 0x0000007c; | ||
768 | } | ||
769 | static inline u32 gmmu_pte_kind_zf32_ms2_1z_v(void) | ||
770 | { | ||
771 | return 0x0000007d; | ||
772 | } | ||
773 | static inline u32 gmmu_pte_kind_zf32_ms4_1z_v(void) | ||
774 | { | ||
775 | return 0x0000007e; | ||
776 | } | ||
777 | static inline u32 gmmu_pte_kind_zf32_ms8_1z_v(void) | ||
778 | { | ||
779 | return 0x0000007f; | ||
780 | } | ||
781 | static inline u32 gmmu_pte_kind_zf32_ms16_1z_v(void) | ||
782 | { | ||
783 | return 0x00000080; | ||
784 | } | ||
785 | static inline u32 gmmu_pte_kind_zf32_2cs_v(void) | ||
786 | { | ||
787 | return 0x00000081; | ||
788 | } | ||
789 | static inline u32 gmmu_pte_kind_zf32_ms2_2cs_v(void) | ||
790 | { | ||
791 | return 0x00000082; | ||
792 | } | ||
793 | static inline u32 gmmu_pte_kind_zf32_ms4_2cs_v(void) | ||
794 | { | ||
795 | return 0x00000083; | ||
796 | } | ||
797 | static inline u32 gmmu_pte_kind_zf32_ms8_2cs_v(void) | ||
798 | { | ||
799 | return 0x00000084; | ||
800 | } | ||
801 | static inline u32 gmmu_pte_kind_zf32_ms16_2cs_v(void) | ||
802 | { | ||
803 | return 0x00000085; | ||
804 | } | ||
805 | static inline u32 gmmu_pte_kind_zf32_2cz_v(void) | ||
806 | { | ||
807 | return 0x00000086; | ||
808 | } | ||
809 | static inline u32 gmmu_pte_kind_zf32_ms2_2cz_v(void) | ||
810 | { | ||
811 | return 0x00000087; | ||
812 | } | ||
813 | static inline u32 gmmu_pte_kind_zf32_ms4_2cz_v(void) | ||
814 | { | ||
815 | return 0x00000088; | ||
816 | } | ||
817 | static inline u32 gmmu_pte_kind_zf32_ms8_2cz_v(void) | ||
818 | { | ||
819 | return 0x00000089; | ||
820 | } | ||
821 | static inline u32 gmmu_pte_kind_zf32_ms16_2cz_v(void) | ||
822 | { | ||
823 | return 0x0000008a; | ||
824 | } | ||
825 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_v(void) | ||
826 | { | ||
827 | return 0x0000008b; | ||
828 | } | ||
829 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_v(void) | ||
830 | { | ||
831 | return 0x0000008c; | ||
832 | } | ||
833 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_v(void) | ||
834 | { | ||
835 | return 0x0000008d; | ||
836 | } | ||
837 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_v(void) | ||
838 | { | ||
839 | return 0x0000008e; | ||
840 | } | ||
841 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1cs_v(void) | ||
842 | { | ||
843 | return 0x0000008f; | ||
844 | } | ||
845 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1cs_v(void) | ||
846 | { | ||
847 | return 0x00000090; | ||
848 | } | ||
849 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1cs_v(void) | ||
850 | { | ||
851 | return 0x00000091; | ||
852 | } | ||
853 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1cs_v(void) | ||
854 | { | ||
855 | return 0x00000092; | ||
856 | } | ||
857 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1zv_v(void) | ||
858 | { | ||
859 | return 0x00000097; | ||
860 | } | ||
861 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1zv_v(void) | ||
862 | { | ||
863 | return 0x00000098; | ||
864 | } | ||
865 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1zv_v(void) | ||
866 | { | ||
867 | return 0x00000099; | ||
868 | } | ||
869 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1zv_v(void) | ||
870 | { | ||
871 | return 0x0000009a; | ||
872 | } | ||
873 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1czv_v(void) | ||
874 | { | ||
875 | return 0x0000009b; | ||
876 | } | ||
877 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1czv_v(void) | ||
878 | { | ||
879 | return 0x0000009c; | ||
880 | } | ||
881 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1czv_v(void) | ||
882 | { | ||
883 | return 0x0000009d; | ||
884 | } | ||
885 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1czv_v(void) | ||
886 | { | ||
887 | return 0x0000009e; | ||
888 | } | ||
889 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cs_v(void) | ||
890 | { | ||
891 | return 0x0000009f; | ||
892 | } | ||
893 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cs_v(void) | ||
894 | { | ||
895 | return 0x000000a0; | ||
896 | } | ||
897 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cs_v(void) | ||
898 | { | ||
899 | return 0x000000a1; | ||
900 | } | ||
901 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cs_v(void) | ||
902 | { | ||
903 | return 0x000000a2; | ||
904 | } | ||
905 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cszv_v(void) | ||
906 | { | ||
907 | return 0x000000a3; | ||
908 | } | ||
909 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cszv_v(void) | ||
910 | { | ||
911 | return 0x000000a4; | ||
912 | } | ||
913 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cszv_v(void) | ||
914 | { | ||
915 | return 0x000000a5; | ||
916 | } | ||
917 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cszv_v(void) | ||
918 | { | ||
919 | return 0x000000a6; | ||
920 | } | ||
921 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_v(void) | ||
922 | { | ||
923 | return 0x000000a7; | ||
924 | } | ||
925 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_v(void) | ||
926 | { | ||
927 | return 0x000000a8; | ||
928 | } | ||
929 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_v(void) | ||
930 | { | ||
931 | return 0x000000a9; | ||
932 | } | ||
933 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_v(void) | ||
934 | { | ||
935 | return 0x000000aa; | ||
936 | } | ||
937 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1cs_v(void) | ||
938 | { | ||
939 | return 0x000000ab; | ||
940 | } | ||
941 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1cs_v(void) | ||
942 | { | ||
943 | return 0x000000ac; | ||
944 | } | ||
945 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1cs_v(void) | ||
946 | { | ||
947 | return 0x000000ad; | ||
948 | } | ||
949 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1cs_v(void) | ||
950 | { | ||
951 | return 0x000000ae; | ||
952 | } | ||
953 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1zv_v(void) | ||
954 | { | ||
955 | return 0x000000b3; | ||
956 | } | ||
957 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1zv_v(void) | ||
958 | { | ||
959 | return 0x000000b4; | ||
960 | } | ||
961 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1zv_v(void) | ||
962 | { | ||
963 | return 0x000000b5; | ||
964 | } | ||
965 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1zv_v(void) | ||
966 | { | ||
967 | return 0x000000b6; | ||
968 | } | ||
969 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1czv_v(void) | ||
970 | { | ||
971 | return 0x000000b7; | ||
972 | } | ||
973 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1czv_v(void) | ||
974 | { | ||
975 | return 0x000000b8; | ||
976 | } | ||
977 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1czv_v(void) | ||
978 | { | ||
979 | return 0x000000b9; | ||
980 | } | ||
981 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1czv_v(void) | ||
982 | { | ||
983 | return 0x000000ba; | ||
984 | } | ||
985 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cs_v(void) | ||
986 | { | ||
987 | return 0x000000bb; | ||
988 | } | ||
989 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cs_v(void) | ||
990 | { | ||
991 | return 0x000000bc; | ||
992 | } | ||
993 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cs_v(void) | ||
994 | { | ||
995 | return 0x000000bd; | ||
996 | } | ||
997 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cs_v(void) | ||
998 | { | ||
999 | return 0x000000be; | ||
1000 | } | ||
1001 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cszv_v(void) | ||
1002 | { | ||
1003 | return 0x000000bf; | ||
1004 | } | ||
1005 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cszv_v(void) | ||
1006 | { | ||
1007 | return 0x000000c0; | ||
1008 | } | ||
1009 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cszv_v(void) | ||
1010 | { | ||
1011 | return 0x000000c1; | ||
1012 | } | ||
1013 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cszv_v(void) | ||
1014 | { | ||
1015 | return 0x000000c2; | ||
1016 | } | ||
1017 | static inline u32 gmmu_pte_kind_zf32_x24s8_v(void) | ||
1018 | { | ||
1019 | return 0x000000c3; | ||
1020 | } | ||
1021 | static inline u32 gmmu_pte_kind_zf32_x24s8_1cs_v(void) | ||
1022 | { | ||
1023 | return 0x000000c4; | ||
1024 | } | ||
1025 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_1cs_v(void) | ||
1026 | { | ||
1027 | return 0x000000c5; | ||
1028 | } | ||
1029 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_1cs_v(void) | ||
1030 | { | ||
1031 | return 0x000000c6; | ||
1032 | } | ||
1033 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_1cs_v(void) | ||
1034 | { | ||
1035 | return 0x000000c7; | ||
1036 | } | ||
1037 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_1cs_v(void) | ||
1038 | { | ||
1039 | return 0x000000c8; | ||
1040 | } | ||
1041 | static inline u32 gmmu_pte_kind_zf32_x24s8_2cszv_v(void) | ||
1042 | { | ||
1043 | return 0x000000ce; | ||
1044 | } | ||
1045 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cszv_v(void) | ||
1046 | { | ||
1047 | return 0x000000cf; | ||
1048 | } | ||
1049 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cszv_v(void) | ||
1050 | { | ||
1051 | return 0x000000d0; | ||
1052 | } | ||
1053 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cszv_v(void) | ||
1054 | { | ||
1055 | return 0x000000d1; | ||
1056 | } | ||
1057 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cszv_v(void) | ||
1058 | { | ||
1059 | return 0x000000d2; | ||
1060 | } | ||
1061 | static inline u32 gmmu_pte_kind_zf32_x24s8_2cs_v(void) | ||
1062 | { | ||
1063 | return 0x000000d3; | ||
1064 | } | ||
1065 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cs_v(void) | ||
1066 | { | ||
1067 | return 0x000000d4; | ||
1068 | } | ||
1069 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cs_v(void) | ||
1070 | { | ||
1071 | return 0x000000d5; | ||
1072 | } | ||
1073 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cs_v(void) | ||
1074 | { | ||
1075 | return 0x000000d6; | ||
1076 | } | ||
1077 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cs_v(void) | ||
1078 | { | ||
1079 | return 0x000000d7; | ||
1080 | } | ||
1081 | static inline u32 gmmu_pte_kind_generic_16bx2_v(void) | ||
1082 | { | ||
1083 | return 0x000000fe; | ||
1084 | } | ||
1085 | static inline u32 gmmu_pte_kind_c32_2c_v(void) | ||
1086 | { | ||
1087 | return 0x000000d8; | ||
1088 | } | ||
1089 | static inline u32 gmmu_pte_kind_c32_2cbr_v(void) | ||
1090 | { | ||
1091 | return 0x000000d9; | ||
1092 | } | ||
1093 | static inline u32 gmmu_pte_kind_c32_2cba_v(void) | ||
1094 | { | ||
1095 | return 0x000000da; | ||
1096 | } | ||
1097 | static inline u32 gmmu_pte_kind_c32_2cra_v(void) | ||
1098 | { | ||
1099 | return 0x000000db; | ||
1100 | } | ||
1101 | static inline u32 gmmu_pte_kind_c32_2bra_v(void) | ||
1102 | { | ||
1103 | return 0x000000dc; | ||
1104 | } | ||
1105 | static inline u32 gmmu_pte_kind_c32_ms2_2c_v(void) | ||
1106 | { | ||
1107 | return 0x000000dd; | ||
1108 | } | ||
1109 | static inline u32 gmmu_pte_kind_c32_ms2_2cbr_v(void) | ||
1110 | { | ||
1111 | return 0x000000de; | ||
1112 | } | ||
1113 | static inline u32 gmmu_pte_kind_c32_ms4_2c_v(void) | ||
1114 | { | ||
1115 | return 0x000000df; | ||
1116 | } | ||
1117 | static inline u32 gmmu_pte_kind_c32_ms4_2cbr_v(void) | ||
1118 | { | ||
1119 | return 0x000000e0; | ||
1120 | } | ||
1121 | static inline u32 gmmu_pte_kind_c32_ms4_2cba_v(void) | ||
1122 | { | ||
1123 | return 0x000000e1; | ||
1124 | } | ||
1125 | static inline u32 gmmu_pte_kind_c32_ms4_2cra_v(void) | ||
1126 | { | ||
1127 | return 0x000000e2; | ||
1128 | } | ||
1129 | static inline u32 gmmu_pte_kind_c32_ms4_2bra_v(void) | ||
1130 | { | ||
1131 | return 0x000000e3; | ||
1132 | } | ||
1133 | static inline u32 gmmu_pte_kind_c32_ms4_4cbra_v(void) | ||
1134 | { | ||
1135 | return 0x0000002c; | ||
1136 | } | ||
1137 | static inline u32 gmmu_pte_kind_c32_ms8_ms16_2c_v(void) | ||
1138 | { | ||
1139 | return 0x000000e4; | ||
1140 | } | ||
1141 | static inline u32 gmmu_pte_kind_c32_ms8_ms16_2cra_v(void) | ||
1142 | { | ||
1143 | return 0x000000e5; | ||
1144 | } | ||
1145 | static inline u32 gmmu_pte_kind_c64_2c_v(void) | ||
1146 | { | ||
1147 | return 0x000000e6; | ||
1148 | } | ||
1149 | static inline u32 gmmu_pte_kind_c64_2cbr_v(void) | ||
1150 | { | ||
1151 | return 0x000000e7; | ||
1152 | } | ||
1153 | static inline u32 gmmu_pte_kind_c64_2cba_v(void) | ||
1154 | { | ||
1155 | return 0x000000e8; | ||
1156 | } | ||
1157 | static inline u32 gmmu_pte_kind_c64_2cra_v(void) | ||
1158 | { | ||
1159 | return 0x000000e9; | ||
1160 | } | ||
1161 | static inline u32 gmmu_pte_kind_c64_2bra_v(void) | ||
1162 | { | ||
1163 | return 0x000000ea; | ||
1164 | } | ||
1165 | static inline u32 gmmu_pte_kind_c64_ms2_2c_v(void) | ||
1166 | { | ||
1167 | return 0x000000eb; | ||
1168 | } | ||
1169 | static inline u32 gmmu_pte_kind_c64_ms2_2cbr_v(void) | ||
1170 | { | ||
1171 | return 0x000000ec; | ||
1172 | } | ||
1173 | static inline u32 gmmu_pte_kind_c64_ms4_2c_v(void) | ||
1174 | { | ||
1175 | return 0x000000ed; | ||
1176 | } | ||
1177 | static inline u32 gmmu_pte_kind_c64_ms4_2cbr_v(void) | ||
1178 | { | ||
1179 | return 0x000000ee; | ||
1180 | } | ||
1181 | static inline u32 gmmu_pte_kind_c64_ms4_2cba_v(void) | ||
1182 | { | ||
1183 | return 0x000000ef; | ||
1184 | } | ||
1185 | static inline u32 gmmu_pte_kind_c64_ms4_2cra_v(void) | ||
1186 | { | ||
1187 | return 0x000000f0; | ||
1188 | } | ||
1189 | static inline u32 gmmu_pte_kind_c64_ms4_2bra_v(void) | ||
1190 | { | ||
1191 | return 0x000000f1; | ||
1192 | } | ||
1193 | static inline u32 gmmu_pte_kind_c64_ms4_4cbra_v(void) | ||
1194 | { | ||
1195 | return 0x0000002d; | ||
1196 | } | ||
1197 | static inline u32 gmmu_pte_kind_c64_ms8_ms16_2c_v(void) | ||
1198 | { | ||
1199 | return 0x000000f2; | ||
1200 | } | ||
1201 | static inline u32 gmmu_pte_kind_c64_ms8_ms16_2cra_v(void) | ||
1202 | { | ||
1203 | return 0x000000f3; | ||
1204 | } | ||
1205 | static inline u32 gmmu_pte_kind_c128_2c_v(void) | ||
1206 | { | ||
1207 | return 0x000000f4; | ||
1208 | } | ||
1209 | static inline u32 gmmu_pte_kind_c128_2cr_v(void) | ||
1210 | { | ||
1211 | return 0x000000f5; | ||
1212 | } | ||
1213 | static inline u32 gmmu_pte_kind_c128_ms2_2c_v(void) | ||
1214 | { | ||
1215 | return 0x000000f6; | ||
1216 | } | ||
1217 | static inline u32 gmmu_pte_kind_c128_ms2_2cr_v(void) | ||
1218 | { | ||
1219 | return 0x000000f7; | ||
1220 | } | ||
1221 | static inline u32 gmmu_pte_kind_c128_ms4_2c_v(void) | ||
1222 | { | ||
1223 | return 0x000000f8; | ||
1224 | } | ||
1225 | static inline u32 gmmu_pte_kind_c128_ms4_2cr_v(void) | ||
1226 | { | ||
1227 | return 0x000000f9; | ||
1228 | } | ||
1229 | static inline u32 gmmu_pte_kind_c128_ms8_ms16_2c_v(void) | ||
1230 | { | ||
1231 | return 0x000000fa; | ||
1232 | } | ||
1233 | static inline u32 gmmu_pte_kind_c128_ms8_ms16_2cr_v(void) | ||
1234 | { | ||
1235 | return 0x000000fb; | ||
1236 | } | ||
1237 | static inline u32 gmmu_pte_kind_x8c24_v(void) | ||
1238 | { | ||
1239 | return 0x000000fc; | ||
1240 | } | ||
1241 | static inline u32 gmmu_pte_kind_pitch_no_swizzle_v(void) | ||
1242 | { | ||
1243 | return 0x000000fd; | ||
1244 | } | ||
1245 | static inline u32 gmmu_pte_kind_smsked_message_v(void) | ||
1246 | { | ||
1247 | return 0x000000ca; | ||
1248 | } | ||
1249 | static inline u32 gmmu_pte_kind_smhost_message_v(void) | ||
1250 | { | ||
1251 | return 0x000000cb; | ||
1252 | } | ||
1253 | static inline u32 gmmu_pte_kind_s8_v(void) | ||
1254 | { | ||
1255 | return 0x0000002a; | ||
1256 | } | ||
1257 | static inline u32 gmmu_pte_kind_s8_2s_v(void) | ||
1258 | { | ||
1259 | return 0x0000002b; | ||
1260 | } | ||
1261 | #endif | ||