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author | Deepak Nibade <dnibade@nvidia.com> | 2018-01-16 06:07:37 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-02-07 18:35:47 -0500 |
commit | f0cbe19b12524f5df6466eaf86acbfb349def6b1 (patch) | |
tree | bed8a312e29592d41d9de4afb331756c2d38fb96 /drivers/gpu/nvgpu/gp106/hal_gp106.c | |
parent | 0c8deb74aff6d0781cdf3278f56d7bce42b16a67 (diff) |
gpu: nvgpu: add user API to get read-only syncpoint address map
Add User space API NVGPU_AS_IOCTL_GET_SYNC_RO_MAP to get read-only syncpoint
address map in user space
We already map whole syncpoint shim to each address space with base address
being vm->syncpt_ro_map_gpu_va
This new API exposes this base GPU_VA address of syncpoint map, and unit size
of each syncpoint to user space.
User space can then calculate address of each syncpoint as
syncpoint_address = base_gpu_va + (syncpoint_id * syncpoint_unit_size)
Note that this syncpoint address is read_only, and should be only used for
inserting semaphore acquires.
Adding semaphore release with this address would result in MMU_FAULT
Define new HAL g->ops.fifo.get_sync_ro_map and set this for all GPUs supported
on Xavier SoC
Bug 200327559
Change-Id: Ica0db48fc28fdd0ff2a5eb09574dac843dc5e4fd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1649365
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 77a1b8f6..502a6778 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -496,6 +496,7 @@ static const struct gpu_ops gp106_ops = { | |||
496 | .get_syncpt_wait_cmd_size = gk20a_fifo_get_syncpt_wait_cmd_size, | 496 | .get_syncpt_wait_cmd_size = gk20a_fifo_get_syncpt_wait_cmd_size, |
497 | .add_syncpt_incr_cmd = gk20a_fifo_add_syncpt_incr_cmd, | 497 | .add_syncpt_incr_cmd = gk20a_fifo_add_syncpt_incr_cmd, |
498 | .get_syncpt_incr_cmd_size = gk20a_fifo_get_syncpt_incr_cmd_size, | 498 | .get_syncpt_incr_cmd_size = gk20a_fifo_get_syncpt_incr_cmd_size, |
499 | .get_sync_ro_map = NULL, | ||
499 | #endif | 500 | #endif |
500 | .resetup_ramfc = gp10b_fifo_resetup_ramfc, | 501 | .resetup_ramfc = gp10b_fifo_resetup_ramfc, |
501 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, | 502 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, |