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authorMahantesh Kumbar <mkumbar@nvidia.com>2018-02-13 04:07:18 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-03-08 02:27:49 -0500
commitcc4b9f540f66abc9f60cf9f8e2217ff17349bc77 (patch)
tree695dca926578d8b02fab2cbf9fb98d3d4733c39f /drivers/gpu/nvgpu/gp106/hal_gp106.c
parent418f31cd91a5c3ca45f0920ed64205def49c8a80 (diff)
gpu: nvgpu: PMU super surface support
- Added ops "pmu.alloc_super_surface" to create memory space for pmu super surface - Defined method nvgpu_pmu_sysmem_surface_alloc() to allocate pmu super surface memory & assigned to "pmu.alloc_super_surface" for gv100 - "pmu.alloc_super_surface" set to NULL for gp106 - Memory space of size "struct nv_pmu_super_surface" is allocated during pmu sw init setup if "pmu.alloc_super_surface" is not NULL & free if error occur. - Added ops "pmu_ver.config_pmu_cmdline_args_super_surface" to describe PMU super surface details to PMU ucode as part of pmu command line args command if "pmu.alloc_super_surface" is not NULL. - Updated pmu_cmdline_args_v6 to include member "struct flcn_mem_desc_v0 super_surface" - Free allocated memory for PMU super surface in nvgpu_remove_pmu_support() method - Added "struct nvgpu_mem super_surface_buf" to "nvgpu_pmu" struct - Created header file "gpmu_super_surf_if.h" to include interface about pmu super surface, added "struct nv_pmu_super_surface" to hold super surface members along with rsvd[x] dummy space to sync members offset with PMU super surface members. Change-Id: I2b28912bf4d86a8cc72884e3b023f21c73fb3503 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1656571 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/hal_gp106.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index e3d5556f..b0eab947 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -611,6 +611,7 @@ static const struct gpu_ops gp106_ops = {
611 .pmu_get_queue_tail = pwr_pmu_queue_tail_r, 611 .pmu_get_queue_tail = pwr_pmu_queue_tail_r,
612 .pmu_lpwr_enable_pg = nvgpu_lpwr_enable_pg, 612 .pmu_lpwr_enable_pg = nvgpu_lpwr_enable_pg,
613 .get_irqdest = gk20a_pmu_get_irqdest, 613 .get_irqdest = gk20a_pmu_get_irqdest,
614 .alloc_super_surface = NULL,
614 }, 615 },
615 .clk = { 616 .clk = {
616 .init_clk_support = gp106_init_clk_support, 617 .init_clk_support = gp106_init_clk_support,