gpu: nvgpu: initialize czf_bypass only once

We right now initialize czf_bypass value in gr_gp10b_init_preemption_state()
which is run at every rail ungate
And that results in any user specified value through sysfs getting lost after
railgate

To fix this, move initialization of czf_bypass to gk20a_init_gr_setup_sw() so
that it gets initialized only once
Add new HAL g->ops.gr.init_czf_bypass to initialize same and define it for
gp10b/gp106/vgpu-gp10b

Bug 2008262

Change-Id: I80a38ef527c86e32c6d64d0626b867239db9ea51
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1585224
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 59f72e13..b6f5a4cd 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -349,6 +349,7 @@ static const struct gpu_ops gp106_ops = {
                 .set_boosted_ctx = NULL,
                 .set_preemption_mode = gr_gp10b_set_preemption_mode,
                 .set_czf_bypass = gr_gp10b_set_czf_bypass,
+                .init_czf_bypass = gr_gp10b_init_czf_bypass,
                 .pre_process_sm_exception = gr_gp10b_pre_process_sm_exception,
                 .set_preemption_buffer_va = gr_gp10b_set_preemption_buffer_va,
                 .init_preemption_state = NULL,