gpu: nvgpu: FECS trace support on gp106

Enable FECS ctxsw tracing for gp106. Ensure that FECS records
have been written to memory before accessing the ring. Update
read index only once all records have been processed.

Jira EVLR-424

Change-Id: I1a21f841fcce1588397408906d77e2c3bf4a8c01
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1258243
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index ee361953..0badd0a1 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -21,6 +21,7 @@
 #include "gk20a/gk20a.h"
 
 #include "gp10b/gr_gp10b.h"
+#include "gp10b/fecs_trace_gp10b.h"
 #include "gp10b/mc_gp10b.h"
 #include "gp106/ltc_gp106.h"
 #include "gp10b/mm_gp10b.h"
@@ -219,6 +220,7 @@ int gp106_init_hal(struct gk20a *g)
         gops->pmupstate = true;
         gp10b_init_mc(gops);
         gp106_init_gr(gops);
+        gp10b_init_fecs_trace_ops(gops);
         gp106_init_ltc(gops);
         gp106_init_fb(gops);
         gp106_init_fifo(gops);