gpu: nvgpu: rework ecc structure and sysfs

- create common file common/ecc.c which include common functions for add
  ecc counters and remove counters.
- common code will create a list of all counter which make it easier to
  iterate all counters.
- Add chip specific file for adding ecc counters.
- add linux specific file os/linux/ecc_sysfs.c to export counters to
  sysfs.
- remove obsolete code
- MISRA violation for using snprintf is not solved, tracking with
  jira NVGPU-859

Jira NVGPUT-115

Change-Id: I1905c43c5c9b2b131199807533dee8e63ddc12f4
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1763536
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 9490ec10..eb150ce8 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -382,10 +382,6 @@ static const struct gpu_ops gp106_ops = {
                 .update_boosted_ctx = NULL,
                 .set_bes_crop_debug3 = gr_gp10b_set_bes_crop_debug3,
                 .set_bes_crop_debug4 = gr_gp10b_set_bes_crop_debug4,
-#ifdef CONFIG_SYSFS
-                .create_gr_sysfs = NULL,
-                .remove_gr_sysfs = NULL,
-#endif
                 .set_ctxsw_preemption_mode = gr_gp106_set_ctxsw_preemption_mode,
                 .load_ctxsw_ucode = gr_gm20b_load_ctxsw_ucode,
                 .fecs_host_int_enable = gr_gk20a_fecs_host_int_enable,