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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-03-23 11:41:04 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:16 -0500
commit3d0f9a751784ac9eb27f9f989f3b584ff5dc8f17 (patch)
tree4c1df46e81b17f47ddc8731beb95c7f351de7788 /drivers/gpu/nvgpu/gp106/hal_gp106.c
parent21eda905ea69a0e090f6e29c444a9129c65f0b1f (diff)
gpu: nvgpu: Add support for gp104 and gp106
Add support for chips gp104 and gp106. Change-Id: Ied5f239bdd0ec85245bce1fb6ef51330871d0f05 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120465 GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams <kadams@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/hal_gp106.c215
1 files changed, 215 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
new file mode 100644
index 00000000..5c9e012d
--- /dev/null
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -0,0 +1,215 @@
1/*
2 * GP106 HAL interface
3 *
4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/types.h>
17#include <linux/printk.h>
18
19#include <linux/types.h>
20
21#include "gk20a/gk20a.h"
22
23#include "gp10b/gr_gp10b.h"
24#include "gp10b/mc_gp10b.h"
25#include "gp10b/ltc_gp10b.h"
26#include "gp10b/mm_gp10b.h"
27#include "gp10b/ce2_gp10b.h"
28#include "gp10b/fb_gp10b.h"
29#include "gp10b/fifo_gp10b.h"
30#include "gp10b/gp10b_gating_reglist.h"
31#include "gp10b/regops_gp10b.h"
32#include "gp10b/cde_gp10b.h"
33#include "gp10b/therm_gp10b.h"
34
35#include "gm206/bios_gm206.h"
36
37#include "gm20b/gr_gm20b.h"
38#include "gm20b/fifo_gm20b.h"
39#include "gm20b/pmu_gm20b.h"
40#include "gm20b/clk_gm20b.h"
41
42#include "gp106/pmu_gp106.h"
43#include "gp106/gr_ctx_gp106.h"
44#include "gp106/gr_gp106.h"
45#include "nvgpu_gpuid_t18x.h"
46#include "hw_proj_gp106.h"
47
48static struct gpu_ops gp106_ops = {
49 .clock_gating = {
50 .slcg_bus_load_gating_prod =
51 gp10b_slcg_bus_load_gating_prod,
52 .slcg_ce2_load_gating_prod =
53 gp10b_slcg_ce2_load_gating_prod,
54 .slcg_chiplet_load_gating_prod =
55 gp10b_slcg_chiplet_load_gating_prod,
56 .slcg_ctxsw_firmware_load_gating_prod =
57 gp10b_slcg_ctxsw_firmware_load_gating_prod,
58 .slcg_fb_load_gating_prod =
59 gp10b_slcg_fb_load_gating_prod,
60 .slcg_fifo_load_gating_prod =
61 gp10b_slcg_fifo_load_gating_prod,
62 .slcg_gr_load_gating_prod =
63 gr_gp10b_slcg_gr_load_gating_prod,
64 .slcg_ltc_load_gating_prod =
65 ltc_gp10b_slcg_ltc_load_gating_prod,
66 .slcg_perf_load_gating_prod =
67 gp10b_slcg_perf_load_gating_prod,
68 .slcg_priring_load_gating_prod =
69 gp10b_slcg_priring_load_gating_prod,
70 .slcg_pmu_load_gating_prod =
71 gp10b_slcg_pmu_load_gating_prod,
72 .slcg_therm_load_gating_prod =
73 gp10b_slcg_therm_load_gating_prod,
74 .slcg_xbar_load_gating_prod =
75 gp10b_slcg_xbar_load_gating_prod,
76 .blcg_bus_load_gating_prod =
77 gp10b_blcg_bus_load_gating_prod,
78 .blcg_ce_load_gating_prod =
79 gp10b_blcg_ce_load_gating_prod,
80 .blcg_ctxsw_firmware_load_gating_prod =
81 gp10b_blcg_ctxsw_firmware_load_gating_prod,
82 .blcg_fb_load_gating_prod =
83 gp10b_blcg_fb_load_gating_prod,
84 .blcg_fifo_load_gating_prod =
85 gp10b_blcg_fifo_load_gating_prod,
86 .blcg_gr_load_gating_prod =
87 gp10b_blcg_gr_load_gating_prod,
88 .blcg_ltc_load_gating_prod =
89 gp10b_blcg_ltc_load_gating_prod,
90 .blcg_pwr_csb_load_gating_prod =
91 gp10b_blcg_pwr_csb_load_gating_prod,
92 .blcg_pmu_load_gating_prod =
93 gp10b_blcg_pmu_load_gating_prod,
94 .blcg_xbar_load_gating_prod =
95 gp10b_blcg_xbar_load_gating_prod,
96 .pg_gr_load_gating_prod =
97 gr_gp10b_pg_gr_load_gating_prod,
98 }
99};
100
101static int gp106_get_litter_value(struct gk20a *g,
102 enum nvgpu_litter_value value)
103{
104 int ret = -EINVAL;
105
106 switch (value) {
107 case GPU_LIT_NUM_GPCS:
108 ret = proj_scal_litter_num_gpcs_v();
109 break;
110 case GPU_LIT_NUM_PES_PER_GPC:
111 ret = proj_scal_litter_num_pes_per_gpc_v();
112 break;
113 case GPU_LIT_NUM_ZCULL_BANKS:
114 ret = proj_scal_litter_num_zcull_banks_v();
115 break;
116 case GPU_LIT_NUM_TPC_PER_GPC:
117 ret = proj_scal_litter_num_tpc_per_gpc_v();
118 break;
119 case GPU_LIT_NUM_FBPS:
120 ret = proj_scal_litter_num_fbps_v();
121 break;
122 case GPU_LIT_GPC_BASE:
123 ret = proj_gpc_base_v();
124 break;
125 case GPU_LIT_GPC_STRIDE:
126 ret = proj_gpc_stride_v();
127 break;
128 case GPU_LIT_GPC_SHARED_BASE:
129 ret = proj_gpc_shared_base_v();
130 break;
131 case GPU_LIT_TPC_IN_GPC_BASE:
132 ret = proj_tpc_in_gpc_base_v();
133 break;
134 case GPU_LIT_TPC_IN_GPC_STRIDE:
135 ret = proj_tpc_in_gpc_stride_v();
136 break;
137 case GPU_LIT_TPC_IN_GPC_SHARED_BASE:
138 ret = proj_tpc_in_gpc_shared_base_v();
139 break;
140 case GPU_LIT_PPC_IN_GPC_STRIDE:
141 ret = proj_ppc_in_gpc_stride_v();
142 break;
143 case GPU_LIT_ROP_BASE:
144 ret = proj_rop_base_v();
145 break;
146 case GPU_LIT_ROP_STRIDE:
147 ret = proj_rop_stride_v();
148 break;
149 case GPU_LIT_ROP_SHARED_BASE:
150 ret = proj_rop_shared_base_v();
151 break;
152 case GPU_LIT_HOST_NUM_PBDMA:
153 ret = proj_host_num_pbdma_v();
154 break;
155 case GPU_LIT_LTC_STRIDE:
156 ret = proj_ltc_stride_v();
157 break;
158 case GPU_LIT_LTS_STRIDE:
159 ret = proj_lts_stride_v();
160 break;
161 case GPU_LIT_NUM_FBPAS:
162 ret = proj_scal_litter_num_fbpas_v();
163 break;
164 case GPU_LIT_FBPA_STRIDE:
165 ret = proj_fbpa_stride_v();
166 break;
167 default:
168 BUG();
169 break;
170 }
171
172 return ret;
173}
174
175int gp106_init_hal(struct gk20a *g)
176{
177 struct gpu_ops *gops = &g->ops;
178 struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics;
179
180 gk20a_dbg_fn("");
181
182 *gops = gp106_ops;
183
184 gops->privsecurity = 0;
185 gops->securegpccs = 0;
186
187 gp10b_init_mc(gops);
188 gp106_init_gr(gops);
189 gp10b_init_ltc(gops);
190 gp10b_init_fb(gops);
191 gp10b_init_fifo(gops);
192 gp10b_init_ce2(gops);
193 gp106_init_gr_ctx(gops);
194 gp10b_init_mm(gops);
195 gp106_init_pmu_ops(gops);
196 gk20a_init_debug_ops(gops);
197 gp10b_init_regops(gops);
198 gp10b_init_cde_ops(gops);
199 gp10b_init_therm_ops(gops);
200 gm206_init_bios(gops);
201 gops->name = "gp106";
202 gops->get_litter_value = gp106_get_litter_value;
203 gops->chip_init_gpu_characteristics = gk20a_init_gpu_characteristics;
204
205 c->twod_class = FERMI_TWOD_A;
206 c->threed_class = PASCAL_B;
207 c->compute_class = PASCAL_COMPUTE_B;
208 c->gpfifo_class = PASCAL_CHANNEL_GPFIFO_A;
209 c->inline_to_memory_class = KEPLER_INLINE_TO_MEMORY_B;
210 c->dma_copy_class = PASCAL_DMA_COPY_A;
211
212 gk20a_dbg_fn("done");
213
214 return 0;
215}
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-04 22:34:25 -0400