gpu: nvgpu: Add fifo conf support for gp10x

Added fifo configuration support for gp104 and
gp106. These GPU chips have more number of
channel fifo and runlist than gp10b.
Added get_num_fifos and
eng_runlist_base_size function pointer
to find out the actual value from HW headers.

JIRA DNVGPU-25

Change-Id: I2322a6354eaa2af2b2605f3e9eedebf9827c7dda
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1164653
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 1b22547d..f9cd2e07 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -26,7 +26,7 @@
 #include "gp10b/mm_gp10b.h"
 #include "gp10b/ce_gp10b.h"
 #include "gp10b/fb_gp10b.h"
-#include "gp10b/fifo_gp10b.h"
+#include "gp106/fifo_gp106.h"
 #include "gp10b/gp10b_gating_reglist.h"
 #include "gp10b/regops_gp10b.h"
 #include "gp10b/cde_gp10b.h"
@@ -193,7 +193,7 @@ int gp106_init_hal(struct gk20a *g)
         gp106_init_gr(gops);
         gp10b_init_ltc(gops);
         gp10b_init_fb(gops);
-        gp10b_init_fifo(gops);
+        gp106_init_fifo(gops);
         gp10b_init_ce(gops);
         gp106_init_gr_ctx(gops);
         gp106_init_mm(gops);