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| author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-05-20 11:08:33 -0400 |
|---|---|---|
| committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:07 -0400 |
| commit | 25fc64b944d12c007771efe24badda78be4e4cb7 (patch) | |
| tree | 7b2a5d7270824008eab68be1354a9c671cad6203 /drivers/gpu/nvgpu/gp106/hal_gp106.c | |
| parent | 7aded206bc3eb0f36422e9f6f3dab3e065e7e7e4 (diff) | |
gpu: nvgpu: Multiple WPR support
The WPR will be divided into several sub-WPRs,
one for each Falcon and one common for sharing
between Falcons which bootstrap falcons
- Defined & used flag NVGPU_SUPPORT_MULTIPLE_WPR
to know M-WPR support.
- Added struct lsfm_sub_wpr to hold subWPR header info
- Added struct lsf_shared_sub_wpr_header to hold subWPR
info & copied to WPR blob after LSF_WPR_HEADER
- Set NVGPU_SUPPORT_MULTIPLE_WPR to false for gp106,
gv100 & gv11b.
- Added methods to support to multiple WPR support &
called by checking flag NVGPU_SUPPORT_MULTIPLE_WPR
in ucode blob preparation flow.
JIRA NVGPUTU10X / NVGPUT-99
Change-Id: I81d0490158390e79b6841374158805f7a84ee6cb
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1725369
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/hal_gp106.c')
| -rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 67a7968a..a525d117 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
| @@ -830,6 +830,7 @@ int gp106_init_hal(struct gk20a *g) | |||
| 830 | __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); | 830 | __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); |
| 831 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); | 831 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); |
| 832 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); | 832 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); |
| 833 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); | ||
| 833 | 834 | ||
| 834 | /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ | 835 | /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ |
| 835 | if (gops->fuse.check_priv_security(g)) | 836 | if (gops->fuse.check_priv_security(g)) |