gpu: nvgpu: Reorg gr HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
gr sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: Ie37638f442fd68aca8a7ade5f297118447bdc91e
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1542989
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 10 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.h b/drivers/gpu/nvgpu/gp106/gr_gp106.h
index 3f49aac6..28ff56a9 100644
--- a/drivers/gpu/nvgpu/gp106/gr_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/gr_gp106.h
@@ -23,6 +23,15 @@ enum {
         PASCAL_COMPUTE_B         = 0xC1C0,
 };
 
-void gp106_init_gr(struct gk20a *g);
+bool gr_gp106_is_valid_class(struct gk20a *g, u32 class_num);
+u32 gr_gp106_pagepool_default_size(struct gk20a *g);
+int gr_gp106_handle_sw_method(struct gk20a *g, u32 addr,
+                                     u32 class_num, u32 offset, u32 data);
+void gr_gp106_cb_size_default(struct gk20a *g);
+int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g,
+                                struct gr_ctx_desc *gr_ctx,
+                                struct vm_gk20a *vm, u32 class,
+                                u32 graphics_preempt_mode,
+                                u32 compute_preempt_mode);
 
 #endif