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authorsmadhavan <smadhavan@nvidia.com>2018-09-11 01:46:21 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-14 02:45:19 -0400
commit852d77ffafdb8726a8e3cb1cc45cb63b90cb4c3c (patch)
tree7fe0876cce51b86f037661fb04234e2f06acd6ba /drivers/gpu/nvgpu/gp106/flcn_gp106.h
parent1d9d7c04bbbaa38080c3c8f256546bd63f65d494 (diff)
nvgpu: gp106: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in gp106 by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: I2a2d94dd04f4ed7307b7579fccb9d23154cb4946 Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1808250 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/flcn_gp106.h')
-rw-r--r--drivers/gpu/nvgpu/gp106/flcn_gp106.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gp106/flcn_gp106.h b/drivers/gpu/nvgpu/gp106/flcn_gp106.h
index 49275234..d1673734 100644
--- a/drivers/gpu/nvgpu/gp106/flcn_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/flcn_gp106.h
@@ -19,9 +19,9 @@
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE. 20 * DEALINGS IN THE SOFTWARE.
21 */ 21 */
22#ifndef __FLCN_GP106_H__ 22#ifndef NVGPU_FLCN_GP106_H
23#define __FLCN_GP106_H__ 23#define NVGPU_FLCN_GP106_H
24 24
25int gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn); 25int gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn);
26 26
27#endif /* __FLCN_GP106_H__ */ 27#endif /* NVGPU_FLCN_GP106_H */