gpu: nvgpu: Fix mutex MISRA 17.7 violations

MISRA Rule-17.7 requires the return value of all functions to be used.
Fix is either to use the return value or change the function to return
void. This patch contains fix for calls to nvgpu_mutex_init and
improves related error handling.

JIRA NVGPU-677

Change-Id: I609fa138520cc7ccfdd5aa0e7fd28c8ca0b3a21c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1805598
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 14 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gp106/flcn_gp106.c b/drivers/gpu/nvgpu/gp106/flcn_gp106.c
index 5959086d..168d94d3 100644
--- a/drivers/gpu/nvgpu/gp106/flcn_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/flcn_gp106.c
@@ -53,9 +53,10 @@ static void gp106_falcon_ops(struct nvgpu_falcon *flcn)
         gp106_falcon_engine_dependency_ops(flcn);
 }
 
-void gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
+int gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
 {
         struct gk20a *g = flcn->g;
+        int err = 0;
 
         switch (flcn->flcn_id) {
         case FALCON_ID_PMU:
@@ -72,28 +73,35 @@ void gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
                 flcn->flcn_base = FALCON_FECS_BASE;
                 flcn->is_falcon_supported = true;
                 flcn->is_interrupt_enabled = false;
-        break;
+                break;
         case FALCON_ID_GPCCS:
                 flcn->flcn_base = FALCON_GPCCS_BASE;
                 flcn->is_falcon_supported = true;
                 flcn->is_interrupt_enabled = false;
-        break;
+                break;
         case FALCON_ID_NVDEC:
                 flcn->flcn_base = FALCON_NVDEC_BASE;
                 flcn->is_falcon_supported = true;
                 flcn->is_interrupt_enabled = true;
-        break;
+                break;
         default:
                 flcn->is_falcon_supported = false;
                 nvgpu_err(g, "Invalid flcn request");
+                err = -ENODEV;
                 break;
         }
 
         if (flcn->is_falcon_supported) {
-                nvgpu_mutex_init(&flcn->copy_lock);
-                gp106_falcon_ops(flcn);
+                err = nvgpu_mutex_init(&flcn->copy_lock);
+                if (err != 0) {
+                        nvgpu_err(g, "Error in copy_lock mutex initialization");
+                } else {
+                        gp106_falcon_ops(flcn);
+                }
         } else {
                 nvgpu_info(g, "falcon 0x%x not supported on %s",
                         flcn->flcn_id, g->name);
         }
+
+        return err;
 }