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authorMahantesh Kumbar <mkumbar@nvidia.com>2018-07-11 05:30:45 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-07-31 04:25:41 -0400
commit2d454db04fcc0c03e05b4665831e5780240d79b8 (patch)
treec18fd4bc302ea68e57e1e1d95c0f253e800bc043 /drivers/gpu/nvgpu/gp106/flcn_gp106.c
parentd32692ae2427693daf85b3c7b4e24cd36471dec6 (diff)
gpu: nvgpu: falcon queue support
-Renamed "struct pmu_queue" to "struct nvgpu_falcon_queue" & moved to falcon.h -Renamed pmu_queue_* functions to flcn_queue_* & moved to new file falcon_queue.c -Created ops for queue functions in struct nvgpu_falcon_queue to support different queue types like DMEM/FB-Q. -Created ops in nvgpu_falcon_engine_dependency_ops to add engine specific queue functionality & assigned correct HAL functions in hal*.c file. -Made changes in dependent functions as needed to replace struct pmu_queue & calling queue functions using nvgpu_falcon_queue data structure. -Replaced input param "struct nvgpu_pmu *pmu" with "struct gk20a *g" for pmu ops pmu_queue_head/pmu_queue_tail & also for functions gk20a_pmu_queue_head()/ gk20a_pmu_queue_tail(). -Made changes in nvgpu_pmu_queue_init() to use nvgpu_falcon_queue for PMU queue. -Modified Makefile to include falcon_queue.o -Modified Makefile.sources to include falcon_queue.c Change-Id: I956328f6631b7154267fd5a29eaa1826190d99d1 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1776070 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/flcn_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/flcn_gp106.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/flcn_gp106.c b/drivers/gpu/nvgpu/gp106/flcn_gp106.c
index f553f5e1..9f542b6a 100644
--- a/drivers/gpu/nvgpu/gp106/flcn_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/flcn_gp106.c
@@ -28,12 +28,15 @@
28 28
29static void gp106_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn) 29static void gp106_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn)
30{ 30{
31 struct gk20a *g = flcn->g;
31 struct nvgpu_falcon_engine_dependency_ops *flcn_eng_dep_ops = 32 struct nvgpu_falcon_engine_dependency_ops *flcn_eng_dep_ops =
32 &flcn->flcn_engine_dep_ops; 33 &flcn->flcn_engine_dep_ops;
33 34
34 switch (flcn->flcn_id) { 35 switch (flcn->flcn_id) {
35 case FALCON_ID_PMU: 36 case FALCON_ID_PMU:
36 flcn_eng_dep_ops->reset_eng = nvgpu_pmu_reset; 37 flcn_eng_dep_ops->reset_eng = nvgpu_pmu_reset;
38 flcn_eng_dep_ops->queue_head = g->ops.pmu.pmu_queue_head;
39 flcn_eng_dep_ops->queue_tail = g->ops.pmu.pmu_queue_tail;
37 break; 40 break;
38 case FALCON_ID_SEC2: 41 case FALCON_ID_SEC2:
39 flcn_eng_dep_ops->reset_eng = gp106_sec2_reset; 42 flcn_eng_dep_ops->reset_eng = gp106_sec2_reset;