gpu: nvgpu: Add fifo conf support for gp10x

Added fifo configuration support for gp104 and
gp106. These GPU chips have more number of
channel fifo and runlist than gp10b.
Added get_num_fifos and
eng_runlist_base_size function pointer
to find out the actual value from HW headers.

JIRA DNVGPU-25

Change-Id: I2322a6354eaa2af2b2605f3e9eedebf9827c7dda
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1164653
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 30 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp106/fifo_gp106.c b/drivers/gpu/nvgpu/gp106/fifo_gp106.c
new file mode 100644
index 00000000..3c70d517
--- /dev/null
+++ b/drivers/gpu/nvgpu/gp106/fifo_gp106.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include "gk20a/gk20a.h"
+#include "gp10b/fifo_gp10b.h"
+#include "fifo_gp106.h"
+#include "hw_ccsr_gp106.h"
+#include "hw_fifo_gp106.h"
+
+static u32 gp106_fifo_get_num_fifos(struct gk20a *g)
+{
+        return ccsr_channel__size_1_v();
+}
+
+void gp106_init_fifo(struct gpu_ops *gops)
+{
+        gp10b_init_fifo(gops);
+        gops->fifo.get_num_fifos = gp106_fifo_get_num_fifos;
+        gops->fifo.eng_runlist_base_size = fifo_eng_runlist_base__size_1_v;
+}