gpu: nvgpu: Update volt pwm source & raw period

- calculate raw period as per pwm source
- update pwm source for logic & sram rails.

JIRA DNVGPU-123

Change-Id: I50b41d51b6aba760710700522dced7859f815463
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1227626
(cherry picked from commit 6eb5a235dd7bf9031ef1bcfadd6312a2f8758fd4)
Reviewed-on: http://git-master/r/1244663
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.c b/drivers/gpu/nvgpu/gp106/clk_gp106.c
index 4bf03661..1dd3922a 100644
--- a/drivers/gpu/nvgpu/gp106/clk_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/clk_gp106.c
@@ -36,7 +36,12 @@ static int clk_gp106_debugfs_init(struct gk20a *g);
 #endif
 
 #define NUM_NAMEMAPS    4
+#define XTAL4X_KHZ 108000
 
+static u32 gp106_crystal_clk_hz(struct gk20a *g)
+{
+        return (XTAL4X_KHZ * 1000);
+}
 static int gp106_init_clk_support(struct gk20a *g) {
         struct clk_gk20a *clk = &g->clk;
         u32 err = 0;
@@ -221,6 +226,7 @@ err_out:
 
 void gp106_init_clk_ops(struct gpu_ops *gops) {
         gops->clk.init_clk_support = gp106_init_clk_support;
+        gops->clk.get_crystal_clk_hz = gp106_crystal_clk_hz;
 }