gpu: nvgpu: cap minimum gpc clocks to HW limits

JIRA: DNVGPU-180

Change-Id: I1928e77cea4ac87bf2ba2b6b7b2f2942dfb97de9
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1251493
(cherry picked from commit 7b8a105652a3169d9ec0cb7ce52c3b92e42ca310)
Reviewed-on: http://git-master/r/1274545
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 11 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
index d1cbb32b..b4d1afbc 100644
--- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
@@ -28,6 +28,9 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
         enum nv_pmu_clk_clkwhich clkwhich;
         struct clk_set_info *p0_info;
         struct clk_set_info *p5_info;
+        struct avfsfllobjs *pfllobjs =  &(g->clk_pmu.avfs_fllobjs);
+
+        u16 limit_min_mhz;
 
         switch (api_domain) {
         case CTRL_CLK_DOMAIN_MCLK:
@@ -52,7 +55,14 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
         if (!p0_info)
                 return -EINVAL;
 
-        *min_mhz = p5_info->min_mhz;
+        limit_min_mhz = p5_info->min_mhz;
+        /* WAR for DVCO min */
+        if (api_domain == CTRL_CLK_DOMAIN_GPC2CLK)
+                if ((pfllobjs->max_min_freq_mhz) &&
+                (pfllobjs->max_min_freq_mhz > limit_min_mhz))
+                        limit_min_mhz = pfllobjs->max_min_freq_mhz;
+
+        *min_mhz = limit_min_mhz;
         *max_mhz = p0_info->max_mhz;
 
         return 0;