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authorSunny He <suhe@nvidia.com>2017-06-29 17:24:29 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-02 17:43:27 -0400
commit11e29991acd25baef5b786605e136b5e71737b8e (patch)
tree1fd738a07e172ef7cdc2882359424be246964ce3 /drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
parenta15e110a9b790f55a5c6e257cfbf7f7235f5a334 (diff)
gpu: nvgpu: Reorg clk HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the clk and clk_arb sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I553353df836b187b8eac61e16b63080b570c96b8 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1511076 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/clk_arb_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/clk_arb_gp106.c14
1 files changed, 3 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
index 4a907521..5f9c251f 100644
--- a/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/clk_arb_gp106.c
@@ -16,13 +16,13 @@
16#include "clk/clk_arb.h" 16#include "clk/clk_arb.h"
17#include "clk_arb_gp106.h" 17#include "clk_arb_gp106.h"
18 18
19static u32 gp106_get_arbiter_clk_domains(struct gk20a *g) 19u32 gp106_get_arbiter_clk_domains(struct gk20a *g)
20{ 20{
21 (void)g; 21 (void)g;
22 return (CTRL_CLK_DOMAIN_MCLK|CTRL_CLK_DOMAIN_GPC2CLK); 22 return (CTRL_CLK_DOMAIN_MCLK|CTRL_CLK_DOMAIN_GPC2CLK);
23} 23}
24 24
25static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, 25int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
26 u16 *min_mhz, u16 *max_mhz) 26 u16 *min_mhz, u16 *max_mhz)
27{ 27{
28 enum nv_pmu_clk_clkwhich clkwhich; 28 enum nv_pmu_clk_clkwhich clkwhich;
@@ -68,7 +68,7 @@ static int gp106_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
68 return 0; 68 return 0;
69} 69}
70 70
71static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain, 71int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain,
72 u16 *default_mhz) 72 u16 *default_mhz)
73{ 73{
74 enum nv_pmu_clk_clkwhich clkwhich; 74 enum nv_pmu_clk_clkwhich clkwhich;
@@ -96,11 +96,3 @@ static int gp106_get_arbiter_clk_default(struct gk20a *g, u32 api_domain,
96 96
97 return 0; 97 return 0;
98} 98}
99
100void gp106_init_clk_arb_ops(struct gpu_ops *gops)
101{
102 gops->clk_arb.get_arbiter_clk_domains = gp106_get_arbiter_clk_domains;
103 gops->clk_arb.get_arbiter_clk_range = gp106_get_arbiter_clk_range;
104 gops->clk_arb.get_arbiter_clk_default = gp106_get_arbiter_clk_default;
105 gops->clk_arb.get_current_pstate = nvgpu_clk_arb_get_current_pstate;
106}