diff options
author | Srirangan <smadhavan@nvidia.com> | 2018-08-27 01:59:01 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-29 11:59:35 -0400 |
commit | e3710e5431d8f14f1b8c2812f5c1aeeb7bdaac1c (patch) | |
tree | 8a6498b12e10f6b391d3c5dd7c6ac7b340ca60b4 /drivers/gpu/nvgpu/gp106/bios_gp106.c | |
parent | 2f97e683feed3c3ba3c8722c4f6ab7466bcef0c0 (diff) |
gpu: nvgpu: gp106: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces, introducing the braces.
JIRA NVGPU-671
Change-Id: I8493274995ed8de526902dd0ca0808b2972e28aa
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1796806
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/bios_gp106.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/bios_gp106.c | 27 |
1 files changed, 18 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.c b/drivers/gpu/nvgpu/gp106/bios_gp106.c index e470fffc..eedb304e 100644 --- a/drivers/gpu/nvgpu/gp106/bios_gp106.c +++ b/drivers/gpu/nvgpu/gp106/bios_gp106.c | |||
@@ -123,8 +123,9 @@ int gp106_bios_devinit(struct gk20a *g) | |||
123 | nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT); | 123 | nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT); |
124 | } while (!devinit_completed && !nvgpu_timeout_expired(&timeout)); | 124 | } while (!devinit_completed && !nvgpu_timeout_expired(&timeout)); |
125 | 125 | ||
126 | if (nvgpu_timeout_peek_expired(&timeout)) | 126 | if (nvgpu_timeout_peek_expired(&timeout)) { |
127 | err = -ETIMEDOUT; | 127 | err = -ETIMEDOUT; |
128 | } | ||
128 | 129 | ||
129 | nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, | 130 | nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, |
130 | gk20a_get_gr_idle_timeout(g)); | 131 | gk20a_get_gr_idle_timeout(g)); |
@@ -138,8 +139,9 @@ int gp106_bios_preos_wait_for_halt(struct gk20a *g) | |||
138 | { | 139 | { |
139 | int err = 0; | 140 | int err = 0; |
140 | 141 | ||
141 | if (nvgpu_flcn_wait_for_halt(g->pmu.flcn, PMU_BOOT_TIMEOUT_MAX / 1000)) | 142 | if (nvgpu_flcn_wait_for_halt(g->pmu.flcn, PMU_BOOT_TIMEOUT_MAX / 1000)) { |
142 | err = -ETIMEDOUT; | 143 | err = -ETIMEDOUT; |
144 | } | ||
143 | 145 | ||
144 | return err; | 146 | return err; |
145 | } | 147 | } |
@@ -155,8 +157,9 @@ int gp106_bios_preos(struct gk20a *g) | |||
155 | goto out; | 157 | goto out; |
156 | } | 158 | } |
157 | 159 | ||
158 | if (g->ops.bios.preos_reload_check) | 160 | if (g->ops.bios.preos_reload_check) { |
159 | g->ops.bios.preos_reload_check(g); | 161 | g->ops.bios.preos_reload_check(g); |
162 | } | ||
160 | 163 | ||
161 | upload_code(g, g->bios.preos.bootloader_phys_base, | 164 | upload_code(g, g->bios.preos.bootloader_phys_base, |
162 | g->bios.preos.bootloader, | 165 | g->bios.preos.bootloader, |
@@ -190,17 +193,20 @@ int gp106_bios_init(struct gk20a *g) | |||
190 | 193 | ||
191 | nvgpu_log_fn(g, " "); | 194 | nvgpu_log_fn(g, " "); |
192 | 195 | ||
193 | if (g->bios_is_init) | 196 | if (g->bios_is_init) { |
194 | return 0; | 197 | return 0; |
198 | } | ||
195 | 199 | ||
196 | nvgpu_log_info(g, "reading bios from EEPROM"); | 200 | nvgpu_log_info(g, "reading bios from EEPROM"); |
197 | g->bios.size = BIOS_SIZE; | 201 | g->bios.size = BIOS_SIZE; |
198 | g->bios.data = nvgpu_vmalloc(g, BIOS_SIZE); | 202 | g->bios.data = nvgpu_vmalloc(g, BIOS_SIZE); |
199 | if (!g->bios.data) | 203 | if (!g->bios.data) { |
200 | return -ENOMEM; | 204 | return -ENOMEM; |
205 | } | ||
201 | 206 | ||
202 | if (g->ops.xve.disable_shadow_rom) | 207 | if (g->ops.xve.disable_shadow_rom) { |
203 | g->ops.xve.disable_shadow_rom(g); | 208 | g->ops.xve.disable_shadow_rom(g); |
209 | } | ||
204 | for (i = 0; i < g->bios.size/4; i++) { | 210 | for (i = 0; i < g->bios.size/4; i++) { |
205 | u32 val = be32_to_cpu(gk20a_readl(g, 0x300000 + i*4)); | 211 | u32 val = be32_to_cpu(gk20a_readl(g, 0x300000 + i*4)); |
206 | 212 | ||
@@ -209,12 +215,14 @@ int gp106_bios_init(struct gk20a *g) | |||
209 | g->bios.data[(i*4)+2] = (val >> 8) & 0xff; | 215 | g->bios.data[(i*4)+2] = (val >> 8) & 0xff; |
210 | g->bios.data[(i*4)+3] = val & 0xff; | 216 | g->bios.data[(i*4)+3] = val & 0xff; |
211 | } | 217 | } |
212 | if (g->ops.xve.enable_shadow_rom) | 218 | if (g->ops.xve.enable_shadow_rom) { |
213 | g->ops.xve.enable_shadow_rom(g); | 219 | g->ops.xve.enable_shadow_rom(g); |
220 | } | ||
214 | 221 | ||
215 | err = nvgpu_bios_parse_rom(g); | 222 | err = nvgpu_bios_parse_rom(g); |
216 | if (err) | 223 | if (err) { |
217 | goto free_firmware; | 224 | goto free_firmware; |
225 | } | ||
218 | 226 | ||
219 | if (g->bios.vbios_version < g->vbios_min_version) { | 227 | if (g->bios.vbios_version < g->vbios_min_version) { |
220 | nvgpu_err(g, "unsupported VBIOS version %08x", | 228 | nvgpu_err(g, "unsupported VBIOS version %08x", |
@@ -254,7 +262,8 @@ int gp106_bios_init(struct gk20a *g) | |||
254 | 262 | ||
255 | return 0; | 263 | return 0; |
256 | free_firmware: | 264 | free_firmware: |
257 | if (g->bios.data) | 265 | if (g->bios.data) { |
258 | nvgpu_vfree(g, g->bios.data); | 266 | nvgpu_vfree(g, g->bios.data); |
267 | } | ||
259 | return err; | 268 | return err; |
260 | } | 269 | } |