gpu : nvgpu: secure boot code unification.

This exposes all secure boot functions that can be
re-used by other chips. This is the first patch in
this series. Other pacthes will also follow.

JIRA NVGPU-60

Change-Id: I523637bbf601166f8a01ddf29a913e193d3fdc7a
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514567
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 26 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.h b/drivers/gpu/nvgpu/gp106/acr_gp106.h
index 34d2b117..fe8fbdb1 100644
--- a/drivers/gpu/nvgpu/gp106/acr_gp106.h
+++ b/drivers/gpu/nvgpu/gp106/acr_gp106.h
@@ -20,5 +20,31 @@
 #define GP104_GPCCS_UCODE_SIG "gp104/gpccs_sig.bin"
 
 void gp106_init_secure_pmu(struct gpu_ops *gops);
+void lsfm_free_ucode_img_res(struct gk20a *g,
+                                    struct flcn_ucode_img_v1 *p_img);
+void lsfm_free_nonpmu_ucode_img_res(struct gk20a *g,
+                                           struct flcn_ucode_img_v1 *p_img);
+int lsf_gen_wpr_requirements(struct gk20a *g,
+                struct ls_flcn_mgr_v1 *plsfm);
+void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr_v1 *plsfm);
+void lsfm_fill_static_lsb_hdr_info(struct gk20a *g,
+        u32 falcon_id, struct lsfm_managed_ucode_img_v2 *pnode);
+int gp106_pmu_populate_loader_cfg(struct gk20a *g,
+        void *lsfm, u32 *p_bl_gen_desc_size);
 
+int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img);
+int fecs_ucode_details(struct gk20a *g,
+                struct flcn_ucode_img_v1 *p_img);
+int gpccs_ucode_details(struct gk20a *g,
+                struct flcn_ucode_img_v1 *p_img);
+int lsfm_add_ucode_img(struct gk20a *g, struct ls_flcn_mgr_v1 *plsfm,
+        struct flcn_ucode_img_v1 *ucode_image, u32 falcon_id);
+int lsfm_discover_ucode_images(struct gk20a *g,
+        struct ls_flcn_mgr_v1 *plsfm);
+void lsfm_init_wpr_contents(struct gk20a *g,
+                struct ls_flcn_mgr_v1 *plsfm, struct nvgpu_mem *nonwpr);
+int gp106_flcn_populate_bl_dmem_desc(struct gk20a *g,
+        void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid);
+int lsfm_fill_flcn_bl_gen_desc(struct gk20a *g,
+                struct lsfm_managed_ucode_img_v2 *pnode);
 #endif /*__PMU_GP106_H_*/