gpu: nvgpu: Add abstraction for firmware loading

Add nvgpu_firmware data structure, and return it instead of Linux
struct firmare from nvgpu_request_firmware. Also add abstraction
for releasing firmware: nvgpu_release_firmware.

JIRA NVGPU-16

Change-Id: I6dae8262957c0d4506f710289e3a43a6c1729fc7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 14 insertions, 14 deletions

diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c
index da281077..c4045cb6 100644
--- a/drivers/gpu/nvgpu/gp106/acr_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c
@@ -11,13 +11,13 @@
  * more details.
  */
 
-#include <linux/firmware.h>
 #include <linux/debugfs.h>
 
 #include <nvgpu/nvgpu_common.h>
 #include <nvgpu/kmem.h>
 #include <nvgpu/dma.h>
 #include <nvgpu/acr/nvgpu_acr.h>
+#include <nvgpu/firmware.h>
 
 #include "gk20a/gk20a.h"
 #include "gk20a/pmu_gk20a.h"
@@ -137,7 +137,7 @@ void gp106_init_secure_pmu(struct gpu_ops *gops)
 
 static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
 {
-        const struct firmware *pmu_fw, *pmu_desc, *pmu_sig;
+        struct nvgpu_firmware *pmu_fw, *pmu_desc, *pmu_sig;
         struct pmu_gk20a *pmu = &g->pmu;
         struct lsf_ucode_desc_v1 *lsf_desc;
         int err;
@@ -194,14 +194,14 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
         p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc;
         gp106_dbg_pmu("requesting PMU ucode in GM20B exit\n");
 
-        release_firmware(pmu_sig);
+        nvgpu_release_firmware(g, pmu_sig);
         return 0;
 release_sig:
-        release_firmware(pmu_sig);
+        nvgpu_release_firmware(g, pmu_sig);
 release_desc:
-        release_firmware(pmu_desc);
+        nvgpu_release_firmware(g, pmu_desc);
 release_img_fw:
-        release_firmware(pmu_fw);
+        nvgpu_release_firmware(g, pmu_fw);
         return err;
 }
 
@@ -209,7 +209,7 @@ static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
 {
         u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl;
         struct lsf_ucode_desc_v1 *lsf_desc;
-        const struct firmware *fecs_sig = NULL;
+        struct nvgpu_firmware *fecs_sig = NULL;
         int err;
 
         switch (ver) {
@@ -279,12 +279,12 @@ static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
         p_img->header = NULL;
         p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc;
         gp106_dbg_pmu("fecs fw loaded\n");
-        release_firmware(fecs_sig);
+        nvgpu_release_firmware(g, fecs_sig);
         return 0;
 free_lsf_desc:
         nvgpu_kfree(g, lsf_desc);
 rel_sig:
-        release_firmware(fecs_sig);
+        nvgpu_release_firmware(g, fecs_sig);
         return err;
 }
 
@@ -292,7 +292,7 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
 {
         u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl;
         struct lsf_ucode_desc_v1 *lsf_desc;
-        const struct firmware *gpccs_sig = NULL;
+        struct nvgpu_firmware *gpccs_sig = NULL;
         int err;
 
         if (g->ops.securegpccs == false)
@@ -366,12 +366,12 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
         p_img->header = NULL;
         p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc;
         gp106_dbg_pmu("gpccs fw loaded\n");
-        release_firmware(gpccs_sig);
+        nvgpu_release_firmware(g, gpccs_sig);
         return 0;
 free_lsf_desc:
         nvgpu_kfree(g, lsf_desc);
 rel_sig:
-        release_firmware(gpccs_sig);
+        nvgpu_release_firmware(g, gpccs_sig);
         return err;
 }
 
@@ -1048,7 +1048,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g)
         u32 img_size_in_bytes = 0;
         u32 status;
         struct acr_desc *acr = &g->acr;
-        const struct firmware *acr_fw = acr->acr_fw;
+        struct nvgpu_firmware *acr_fw = acr->acr_fw;
         struct flcn_bl_dmem_desc_v1 *bl_dmem_desc = &acr->bl_dmem_desc_v1;
         u32 *acr_ucode_header_t210_load;
         u32 *acr_ucode_data_t210_load;
@@ -1167,7 +1167,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g)
 err_free_ucode_map:
         nvgpu_dma_unmap_free(vm, &acr->acr_ucode);
 err_release_acr_fw:
-        release_firmware(acr_fw);
+        nvgpu_release_firmware(g, acr_fw);
         acr->acr_fw = NULL;
         return err;
 }