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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-04-06 15:09:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-07 16:48:24 -0400
commit86ecddf68734e4a938eda351f4dde11ab507de3f (patch)
tree3a8d89ace77fc3427da6243c81f224883954e8e9 /drivers/gpu/nvgpu/gp106/acr_gp106.c
parentbb72b7e2ed215b26e1d9b94534c24ab4cfa52801 (diff)
gpu: nvgpu: gp106: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I18955b4c46c082883ee0bf589ab17cd66ab0add2 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1457346 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/acr_gp106.c')
-rw-r--r--drivers/gpu/nvgpu/gp106/acr_gp106.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c
index 631f9891..26c8ab53 100644
--- a/drivers/gpu/nvgpu/gp106/acr_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c
@@ -150,7 +150,7 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
150 pmu_fw = nvgpu_request_firmware(g, GM20B_PMU_UCODE_IMAGE, 150 pmu_fw = nvgpu_request_firmware(g, GM20B_PMU_UCODE_IMAGE,
151 NVGPU_REQUEST_FIRMWARE_NO_SOC); 151 NVGPU_REQUEST_FIRMWARE_NO_SOC);
152 if (!pmu_fw) { 152 if (!pmu_fw) {
153 gk20a_err(dev_from_gk20a(g), "failed to load pmu ucode!!"); 153 nvgpu_err(g, "failed to load pmu ucode!!");
154 return -ENOENT; 154 return -ENOENT;
155 } 155 }
156 g->acr.pmu_fw = pmu_fw; 156 g->acr.pmu_fw = pmu_fw;
@@ -160,14 +160,14 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
160 pmu_desc = nvgpu_request_firmware(g, GM20B_PMU_UCODE_DESC, 160 pmu_desc = nvgpu_request_firmware(g, GM20B_PMU_UCODE_DESC,
161 NVGPU_REQUEST_FIRMWARE_NO_SOC); 161 NVGPU_REQUEST_FIRMWARE_NO_SOC);
162 if (!pmu_desc) { 162 if (!pmu_desc) {
163 gk20a_err(dev_from_gk20a(g), "failed to load pmu ucode desc!!"); 163 nvgpu_err(g, "failed to load pmu ucode desc!!");
164 err = -ENOENT; 164 err = -ENOENT;
165 goto release_img_fw; 165 goto release_img_fw;
166 } 166 }
167 pmu_sig = nvgpu_request_firmware(g, GM20B_PMU_UCODE_SIG, 167 pmu_sig = nvgpu_request_firmware(g, GM20B_PMU_UCODE_SIG,
168 NVGPU_REQUEST_FIRMWARE_NO_SOC); 168 NVGPU_REQUEST_FIRMWARE_NO_SOC);
169 if (!pmu_sig) { 169 if (!pmu_sig) {
170 gk20a_err(dev_from_gk20a(g), "failed to load pmu sig!!"); 170 nvgpu_err(g, "failed to load pmu sig!!");
171 err = -ENOENT; 171 err = -ENOENT;
172 goto release_desc; 172 goto release_desc;
173 } 173 }
@@ -177,8 +177,7 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
177 177
178 err = gk20a_init_pmu(pmu); 178 err = gk20a_init_pmu(pmu);
179 if (err) { 179 if (err) {
180 gk20a_err(dev_from_gk20a(g), 180 nvgpu_err(g, "failed to set function pointers");
181 "failed to set function pointers\n");
182 goto release_sig; 181 goto release_sig;
183 } 182 }
184 183
@@ -229,11 +228,11 @@ static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
229 NVGPU_REQUEST_FIRMWARE_NO_SOC); 228 NVGPU_REQUEST_FIRMWARE_NO_SOC);
230 break; 229 break;
231 default: 230 default:
232 gk20a_err(g->dev, "no support for GPUID %x", ver); 231 nvgpu_err(g, "no support for GPUID %x", ver);
233 } 232 }
234 233
235 if (!fecs_sig) { 234 if (!fecs_sig) {
236 gk20a_err(dev_from_gk20a(g), "failed to load fecs sig"); 235 nvgpu_err(g, "failed to load fecs sig");
237 return -ENOENT; 236 return -ENOENT;
238 } 237 }
239 lsf_desc = nvgpu_kzalloc(g, sizeof(struct lsf_ucode_desc_v1)); 238 lsf_desc = nvgpu_kzalloc(g, sizeof(struct lsf_ucode_desc_v1));
@@ -315,11 +314,11 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
315 NVGPU_REQUEST_FIRMWARE_NO_SOC); 314 NVGPU_REQUEST_FIRMWARE_NO_SOC);
316 break; 315 break;
317 default: 316 default:
318 gk20a_err(g->dev, "no support for GPUID %x", ver); 317 nvgpu_err(g, "no support for GPUID %x", ver);
319 } 318 }
320 319
321 if (!gpccs_sig) { 320 if (!gpccs_sig) {
322 gk20a_err(dev_from_gk20a(g), "failed to load gpccs sig"); 321 nvgpu_err(g, "failed to load gpccs sig");
323 return -ENOENT; 322 return -ENOENT;
324 } 323 }
325 lsf_desc = nvgpu_kzalloc(g, sizeof(struct lsf_ucode_desc_v1)); 324 lsf_desc = nvgpu_kzalloc(g, sizeof(struct lsf_ucode_desc_v1));
@@ -1067,7 +1066,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g)
1067 GM20B_HSBIN_PMU_UCODE_IMAGE, 1066 GM20B_HSBIN_PMU_UCODE_IMAGE,
1068 NVGPU_REQUEST_FIRMWARE_NO_SOC); 1067 NVGPU_REQUEST_FIRMWARE_NO_SOC);
1069 if (!acr_fw) { 1068 if (!acr_fw) {
1070 gk20a_err(dev_from_gk20a(g), "pmu ucode get fail"); 1069 nvgpu_err(g, "pmu ucode get fail");
1071 return -ENOENT; 1070 return -ENOENT;
1072 } 1071 }
1073 acr->acr_fw = acr_fw; 1072 acr->acr_fw = acr_fw;
@@ -1090,7 +1089,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g)
1090 acr->fw_hdr->patch_loc), 1089 acr->fw_hdr->patch_loc),
1091 (u32 *)(acr_fw->data + 1090 (u32 *)(acr_fw->data +
1092 acr->fw_hdr->patch_sig)) < 0) { 1091 acr->fw_hdr->patch_sig)) < 0) {
1093 gk20a_err(dev_from_gk20a(g), "patch signatures fail"); 1092 nvgpu_err(g, "patch signatures fail");
1094 err = -1; 1093 err = -1;
1095 goto err_release_acr_fw; 1094 goto err_release_acr_fw;
1096 } 1095 }