diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-09-19 02:53:05 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-25 06:43:45 -0400 |
commit | 4efdc362175c67f93d3546727c8825686619c1cb (patch) | |
tree | cbb723ed22c716d3ae554049a04660ac5fba0b56 /drivers/gpu/nvgpu/gp106/acr_gp106.c | |
parent | d6aa52b15f2c42aa557522d148b137584dcfb454 (diff) |
gpu: nvgpu: ACR load split feature support
-Added code to copy SEC2-RTOS ucode to non-wpr blob
as part of prepare ucode blob.
-Added code to setup & bootstrap GSP, as ACR-ASB needs
ucode to execute on GSP falcon.
-Defined LSF_FALCON_ID_GSPLITE for GSP falcon
-Defined HSBIN_ACR_AHESASC_DBG/PROD_UCODE &
HSBIN_ACR_ASB_DBG/PROD_UCODE to hold names
of ACR AHESASC/ASB ucodes.
-Added defines to hold name of SE2C RTOS ucodes
JIRA NVGPUT-134
Change-Id: I824afed41f785a4ca0fb393bd023db5396c7a399
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1790179
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gp106/acr_gp106.c')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/acr_gp106.c | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c index 2a4ee6d5..f5ae565a 100644 --- a/drivers/gpu/nvgpu/gp106/acr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c | |||
@@ -67,6 +67,7 @@ static get_ucode_details pmu_acr_supp_ucode_list[] = { | |||
67 | pmu_ucode_details, | 67 | pmu_ucode_details, |
68 | fecs_ucode_details, | 68 | fecs_ucode_details, |
69 | gpccs_ucode_details, | 69 | gpccs_ucode_details, |
70 | sec2_ucode_details, | ||
70 | }; | 71 | }; |
71 | 72 | ||
72 | void gp106_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf) | 73 | void gp106_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf) |
@@ -388,6 +389,73 @@ rel_sig: | |||
388 | return err; | 389 | return err; |
389 | } | 390 | } |
390 | 391 | ||
392 | int sec2_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) | ||
393 | { | ||
394 | struct nvgpu_firmware *sec2_fw, *sec2_desc, *sec2_sig; | ||
395 | struct pmu_ucode_desc_v1 *desc; | ||
396 | struct lsf_ucode_desc_v1 *lsf_desc; | ||
397 | u32 *ucode_image; | ||
398 | int err = 0; | ||
399 | |||
400 | gp106_dbg_pmu(g, "requesting SEC2 ucode in %s", g->name); | ||
401 | sec2_fw = nvgpu_request_firmware(g, LSF_SEC2_UCODE_IMAGE_BIN, | ||
402 | NVGPU_REQUEST_FIRMWARE_NO_SOC); | ||
403 | if (sec2_fw == NULL) { | ||
404 | nvgpu_err(g, "failed to load sec2 ucode!!"); | ||
405 | return -ENOENT; | ||
406 | } | ||
407 | |||
408 | ucode_image = (u32 *)sec2_fw->data; | ||
409 | |||
410 | gp106_dbg_pmu(g, "requesting SEC2 ucode desc in %s", g->name); | ||
411 | sec2_desc = nvgpu_request_firmware(g, LSF_SEC2_UCODE_DESC_BIN, | ||
412 | NVGPU_REQUEST_FIRMWARE_NO_SOC); | ||
413 | if (sec2_desc == NULL) { | ||
414 | nvgpu_err(g, "failed to load SEC2 ucode desc!!"); | ||
415 | err = -ENOENT; | ||
416 | goto release_img_fw; | ||
417 | } | ||
418 | |||
419 | desc = (struct pmu_ucode_desc_v1 *)sec2_desc->data; | ||
420 | |||
421 | sec2_sig = nvgpu_request_firmware(g, LSF_SEC2_UCODE_SIG_BIN, | ||
422 | NVGPU_REQUEST_FIRMWARE_NO_SOC); | ||
423 | if (sec2_sig == NULL) { | ||
424 | nvgpu_err(g, "failed to load SEC2 sig!!"); | ||
425 | err = -ENOENT; | ||
426 | goto release_desc; | ||
427 | } | ||
428 | |||
429 | lsf_desc = nvgpu_kzalloc(g, sizeof(struct lsf_ucode_desc_v1)); | ||
430 | if (lsf_desc == NULL) { | ||
431 | err = -ENOMEM; | ||
432 | goto release_sig; | ||
433 | } | ||
434 | |||
435 | memcpy(lsf_desc, (void *)sec2_sig->data, | ||
436 | min_t(size_t, sizeof(*lsf_desc), sec2_sig->size)); | ||
437 | |||
438 | lsf_desc->falcon_id = LSF_FALCON_ID_SEC2; | ||
439 | |||
440 | p_img->desc = desc; | ||
441 | p_img->data = ucode_image; | ||
442 | p_img->data_size = desc->app_start_offset + desc->app_size; | ||
443 | p_img->fw_ver = NULL; | ||
444 | p_img->header = NULL; | ||
445 | p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc; | ||
446 | |||
447 | gp106_dbg_pmu(g, "requesting SEC2 ucode in %s done", g->name); | ||
448 | |||
449 | return err; | ||
450 | release_sig: | ||
451 | nvgpu_release_firmware(g, sec2_sig); | ||
452 | release_desc: | ||
453 | nvgpu_release_firmware(g, sec2_desc); | ||
454 | release_img_fw: | ||
455 | nvgpu_release_firmware(g, sec2_fw); | ||
456 | return err; | ||
457 | } | ||
458 | |||
391 | /* | 459 | /* |
392 | * Discover all supported shared data falcon SUB WPRs | 460 | * Discover all supported shared data falcon SUB WPRs |
393 | */ | 461 | */ |