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authorSeshendra Gadagottu <sgadagottu@nvidia.com>2014-07-01 19:49:46 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:10:24 -0400
commitf554ab30463438e5ce76ecf897a527ba5881fdbf (patch)
tree9cf5b2936a1cb7c4bc1c29015ff1a52343c37a8f /drivers/gpu/nvgpu/gm20b
parent2d666411ab47a1fab5186656ee0182db748dc6c0 (diff)
gpu: nvgpu: Exclude non-secure boot with CONFIG_TEGRA_ACR
Do not compile non-secure boot code if CONFIG_TEGRA_ACR is defined. Bug 1524197 Change-Id: Id1ec222e00e2229e1d28e406e4ddad99e368296e Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/433356 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index ae7864df..25d03736 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -30,9 +30,11 @@ static void gr_gm20b_init_gpc_mmu(struct gk20a *g)
30 30
31 gk20a_dbg_info("initialize gpc mmu"); 31 gk20a_dbg_info("initialize gpc mmu");
32 32
33#ifndef CONFIG_TEGRA_ACR
33 /* Bypass MMU check for non-secure boot. For 34 /* Bypass MMU check for non-secure boot. For
34 * secure-boot,this register write has no-effect */ 35 * secure-boot,this register write has no-effect */
35 gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffff); 36 gk20a_writel(g, fb_priv_mmu_phy_secure_r(), 0xffffffff);
37#endif
36 38
37 temp = gk20a_readl(g, fb_mmu_ctrl_r()); 39 temp = gk20a_readl(g, fb_mmu_ctrl_r());
38 temp &= gr_gpcs_pri_mmu_ctrl_vm_pg_size_m() | 40 temp &= gr_gpcs_pri_mmu_ctrl_vm_pg_size_m() |