gpu: nvgpu: enable ce2 interrupts

enables non-blocking interrupts in ce2 all other
ce2 interrupts are cleared and not handled.

bug 200036089

Change-Id: I9f47b06c677c72ac523019e6a3f70fedd07830a2
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/671783
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 files changed, 83 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/hw_ce2_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_ce2_gm20b.h
new file mode 100644
index 00000000..ca0212f8
--- /dev/null
+++ b/drivers/gpu/nvgpu/gm20b/hw_ce2_gm20b.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+/*
+ * Function naming determines intended use:
+ *
+ *     <x>_r(void) : Returns the offset for register <x>.
+ *
+ *     <x>_o(void) : Returns the offset for element <x>.
+ *
+ *     <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
+ *
+ *     <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
+ *
+ *     <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
+ *         and masked to place it at field <y> of register <x>.  This value
+ *         can be |'d with others to produce a full register value for
+ *         register <x>.
+ *
+ *     <x>_<y>_m(void) : Returns a mask for field <y> of register <x>.  This
+ *         value can be ~'d and then &'d to clear the value of field <y> for
+ *         register <x>.
+ *
+ *     <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
+ *         to place it at field <y> of register <x>.  This value can be |'d
+ *         with others to produce a full register value for <x>.
+ *
+ *     <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
+ *         <x> value 'r' after being shifted to place its LSB at bit 0.
+ *         This value is suitable for direct comparison with other unshifted
+ *         values appropriate for use in field <y> of register <x>.
+ *
+ *     <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
+ *         field <y> of register <x>.  This value is suitable for direct
+ *         comparison with unshifted values appropriate for use in field <y>
+ *         of register <x>.
+ */
+#ifndef _hw_ce2_gm20b_h_
+#define _hw_ce2_gm20b_h_
+
+static inline u32 ce2_intr_status_r(void)
+{
+        return 0x00106908;
+}
+static inline u32 ce2_intr_status_blockpipe_pending_f(void)
+{
+        return 0x1;
+}
+static inline u32 ce2_intr_status_blockpipe_reset_f(void)
+{
+        return 0x1;
+}
+static inline u32 ce2_intr_status_nonblockpipe_pending_f(void)
+{
+        return 0x2;
+}
+static inline u32 ce2_intr_status_nonblockpipe_reset_f(void)
+{
+        return 0x2;
+}
+static inline u32 ce2_intr_status_launcherr_pending_f(void)
+{
+        return 0x4;
+}
+static inline u32 ce2_intr_status_launcherr_reset_f(void)
+{
+        return 0x4;
+}
+#endif
diff --git a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
index 34cf20de..714ceb16 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -1302,10 +1302,6 @@ static inline u32 gr_ds_zbc_color_fmt_val_rf32_gf32_bf32_af32_v(void)
 {
         return 0x00000004;
 }
-static inline u32 gr_ds_zbc_color_fmt_val_a8_b8_g8_r8_v(void)
-{
-        return 0x00000028;
-}
 static inline u32 gr_ds_zbc_z_r(void)
 {
         return 0x00405818;
diff --git a/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h
index 96e21899..3750de06 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_mc_gm20b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,