diff options
author | Supriya <ssharatkumar@nvidia.com> | 2014-07-24 04:44:32 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:36 -0400 |
commit | e34b945834c4fa0ca7aa50224e8d77fafa5fe7e3 (patch) | |
tree | efaf46994b3fa27a320392b2663e9f9e44a12744 /drivers/gpu/nvgpu/gm20b | |
parent | 44b9d5fdb090444534914a5c492a92d7ecefb0e7 (diff) |
nvgpu: new gpmu ucode compatibility
For LS PMU new ucode needs to be used.
Ucode has interface header file changes too.
This patch also has fixes for pmu dmem copy failure
Bug 1509680
Change-Id: I8c7018f889a82104dea590751e650e53e5524a54
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/441734
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 39 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.h | 4 |
2 files changed, 32 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 77f0653e..e5a3e2cd 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -80,7 +80,7 @@ static void free_blob_res(struct gk20a *g) | |||
80 | 80 | ||
81 | int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | 81 | int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) |
82 | { | 82 | { |
83 | const struct firmware *pmu_fw; | 83 | const struct firmware *pmu_fw, *pmu_desc; |
84 | struct pmu_gk20a *pmu = &g->pmu; | 84 | struct pmu_gk20a *pmu = &g->pmu; |
85 | struct lsf_ucode_desc *lsf_desc; | 85 | struct lsf_ucode_desc *lsf_desc; |
86 | int err; | 86 | int err; |
@@ -93,18 +93,28 @@ int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | |||
93 | } | 93 | } |
94 | gm20b_dbg_pmu("Loaded PMU ucode in for blob preparation"); | 94 | gm20b_dbg_pmu("Loaded PMU ucode in for blob preparation"); |
95 | 95 | ||
96 | pmu->desc = (struct pmu_ucode_desc *)pmu_fw->data; | 96 | gm20b_dbg_pmu("requesting PMU ucode desc in GM20B\n"); |
97 | pmu->ucode_image = (u32 *)((u8 *)pmu->desc + | 97 | pmu_desc = gk20a_request_firmware(g, GM20B_PMU_UCODE_DESC); |
98 | pmu->desc->descriptor_size); | 98 | if (!pmu_desc) { |
99 | gk20a_err(dev_from_gk20a(g), "failed to load pmu ucode desc!!"); | ||
100 | gm20b_dbg_pmu("requesting PMU ucode in GM20B failed\n"); | ||
101 | err = -ENOENT; | ||
102 | goto release_img_fw; | ||
103 | } | ||
104 | pmu->desc = (struct pmu_ucode_desc *)pmu_desc->data; | ||
105 | pmu->ucode_image = (u32 *)pmu_fw->data; | ||
106 | |||
99 | err = gk20a_init_pmu(pmu); | 107 | err = gk20a_init_pmu(pmu); |
100 | if (err) { | 108 | if (err) { |
101 | gm20b_dbg_pmu("failed to set function pointers\n"); | 109 | gm20b_dbg_pmu("failed to set function pointers\n"); |
102 | return err; | 110 | goto release_desc; |
103 | } | 111 | } |
104 | 112 | ||
105 | lsf_desc = kzalloc(sizeof(struct lsf_ucode_desc), GFP_KERNEL); | 113 | lsf_desc = kzalloc(sizeof(struct lsf_ucode_desc), GFP_KERNEL); |
106 | if (!lsf_desc) | 114 | if (!lsf_desc) { |
107 | return -ENOMEM; | 115 | err = -ENOMEM; |
116 | goto release_desc; | ||
117 | } | ||
108 | lsf_desc->falcon_id = LSF_FALCON_ID_PMU; | 118 | lsf_desc->falcon_id = LSF_FALCON_ID_PMU; |
109 | 119 | ||
110 | p_img->desc = pmu->desc; | 120 | p_img->desc = pmu->desc; |
@@ -115,6 +125,11 @@ int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | |||
115 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; | 125 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; |
116 | gm20b_dbg_pmu("requesting PMU ucode in GM20B exit\n"); | 126 | gm20b_dbg_pmu("requesting PMU ucode in GM20B exit\n"); |
117 | return 0; | 127 | return 0; |
128 | release_desc: | ||
129 | release_firmware(pmu_desc); | ||
130 | release_img_fw: | ||
131 | release_firmware(pmu_fw); | ||
132 | return err; | ||
118 | } | 133 | } |
119 | 134 | ||
120 | int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | 135 | int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) |
@@ -378,10 +393,8 @@ int pmu_populate_loader_cfg(struct gk20a *g, | |||
378 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, | 393 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, |
379 | clk_get_rate(platform->clk[1])); | 394 | clk_get_rate(platform->clk[1])); |
380 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1); | 395 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1); |
381 | pmu_copy_to_dmem(pmu, addr_args, | ||
382 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), | ||
383 | g->ops.pmu_ver.get_pmu_cmdline_args_size(pmu), 0); | ||
384 | *p_bl_gen_desc_size = sizeof(p_bl_gen_desc->loader_cfg); | 396 | *p_bl_gen_desc_size = sizeof(p_bl_gen_desc->loader_cfg); |
397 | g->acr.pmu_args = addr_args; | ||
385 | return 0; | 398 | return 0; |
386 | } | 399 | } |
387 | 400 | ||
@@ -1026,7 +1039,10 @@ int gm20b_init_pmu_setup_hw1(struct gk20a *g, struct flcn_bl_dmem_desc *desc, | |||
1026 | int err; | 1039 | int err; |
1027 | 1040 | ||
1028 | gk20a_dbg_fn(""); | 1041 | gk20a_dbg_fn(""); |
1042 | mutex_lock(&pmu->isr_enable_lock); | ||
1029 | pmu_reset(pmu); | 1043 | pmu_reset(pmu); |
1044 | pmu->isr_enabled = true; | ||
1045 | mutex_unlock(&pmu->isr_enable_lock); | ||
1030 | 1046 | ||
1031 | /* setup apertures - virtual */ | 1047 | /* setup apertures - virtual */ |
1032 | gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE), | 1048 | gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE), |
@@ -1045,6 +1061,9 @@ int gm20b_init_pmu_setup_hw1(struct gk20a *g, struct flcn_bl_dmem_desc *desc, | |||
1045 | pwr_fbif_transcfg_mem_type_physical_f() | | 1061 | pwr_fbif_transcfg_mem_type_physical_f() | |
1046 | pwr_fbif_transcfg_target_noncoherent_sysmem_f()); | 1062 | pwr_fbif_transcfg_target_noncoherent_sysmem_f()); |
1047 | 1063 | ||
1064 | pmu_copy_to_dmem(pmu, g->acr.pmu_args, | ||
1065 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), | ||
1066 | g->ops.pmu_ver.get_pmu_cmdline_args_size(pmu), 0); | ||
1048 | err = bl_bootstrap(pmu, desc, bl_sz); | 1067 | err = bl_bootstrap(pmu, desc, bl_sz); |
1049 | if (err) | 1068 | if (err) |
1050 | return err; | 1069 | return err; |
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h index 073dc135..b186e489 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h | |||
@@ -24,7 +24,8 @@ | |||
24 | #define MAX_SUPPORTED_LSFM 2 /*PMU, FECS, GPCCS*/ | 24 | #define MAX_SUPPORTED_LSFM 2 /*PMU, FECS, GPCCS*/ |
25 | #define LSF_UCODE_DATA_ALIGNMENT 4096 | 25 | #define LSF_UCODE_DATA_ALIGNMENT 4096 |
26 | 26 | ||
27 | #define GM20B_PMU_UCODE_IMAGE "gpmu_ucode.bin" | 27 | #define GM20B_PMU_UCODE_IMAGE "gpmu_ucode_image.bin" |
28 | #define GM20B_PMU_UCODE_DESC "gpmu_ucode_desc.bin" | ||
28 | #define GM20B_HSBIN_PMU_UCODE_IMAGE "acr_ucode.bin" | 29 | #define GM20B_HSBIN_PMU_UCODE_IMAGE "acr_ucode.bin" |
29 | #define GM20B_HSBIN_PMU_BL_UCODE_IMAGE "pmu_bl.bin" | 30 | #define GM20B_HSBIN_PMU_BL_UCODE_IMAGE "pmu_bl.bin" |
30 | 31 | ||
@@ -363,6 +364,7 @@ struct acr_gm20b { | |||
363 | struct hsflcn_bl_desc *pmu_hsbl_desc; | 364 | struct hsflcn_bl_desc *pmu_hsbl_desc; |
364 | struct bin_hdr *hsbin_hdr; | 365 | struct bin_hdr *hsbin_hdr; |
365 | struct acr_fw_header *fw_hdr; | 366 | struct acr_fw_header *fw_hdr; |
367 | u32 pmu_args; | ||
366 | }; | 368 | }; |
367 | 369 | ||
368 | void gm20b_init_secure_pmu(struct gpu_ops *gops); | 370 | void gm20b_init_secure_pmu(struct gpu_ops *gops); |