gpu: nvgpu: Move Linux nvgpu_mem fields

Hide the Linux specific nvgpu_mem fields so that in subsequent patches
core code can instead of using struct sg_table it can use mem_desc.
Routines for accessing system specific fields will be added as needed.

This is the first step in a fairly major overhaul of the GMMU mapping
routines. There are numerous issues with the current design (or lack
there of): massively coupled code, system dependencies, disorganization,
etc.

JIRA NVGPU-12
JIRA NVGPU-30

Change-Id: I2e7d3ae3a07468cfc17c1c642d28ed1b0952474d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464076
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index b6afa748..7f0edbb2 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -1075,7 +1075,7 @@ static int gm20b_bootstrap_hs_flcn(struct gk20a *g)
         u32 *acr_ucode_header_t210_load;
         u32 *acr_ucode_data_t210_load;
 
-        start = g->ops.mm.get_iova_addr(g, acr->ucode_blob.sgt->sgl, 0);
+        start = g->ops.mm.get_iova_addr(g, acr->ucode_blob.priv.sgt->sgl, 0);
         size = acr->ucode_blob.size;
 
         gm20b_dbg_pmu("");
@@ -1419,7 +1419,8 @@ int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt)
                         goto err_done;
                 }
 
-                acr->hsbl_ucode.gpu_va = gk20a_gmmu_map(vm, &acr->hsbl_ucode.sgt,
+                acr->hsbl_ucode.gpu_va = gk20a_gmmu_map(vm,
+                                &acr->hsbl_ucode.priv.sgt,
                                 bl_sz,
                                 0, /* flags */
                                 gk20a_mem_flag_read_only, false,