diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-03-21 14:17:48 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-03-23 12:34:18 -0400 |
commit | df94d474a8200fc61969e2fc35d1b2a8d7fa5b8c (patch) | |
tree | d86e44d6263d48579346293aaeff7f5b2f826899 /drivers/gpu/nvgpu/gm20b | |
parent | 4492c62ffe9398bd4457f6f1c2773e40afe909fb (diff) |
gpu: nvgpu: add init_pbdma_intr_desc fifo ops
Init device_fatal, channel_fatal and restartable fifo intr pbdma s/w
variables for pbdma_intr_0 interrupt masks for each GPU version separately
pbdma_intr_0 field differences for each GPU version:-
-gk20a : bit 28 does not exists in hw
-gm20b : bit 8(lbreq), 20(xbarconnect) and 28 do not exist in hw
-gp10b : bit 8(lbreq), 20(xbarconnect) do not exist in hw. bit 28,
(syncpoint_illegal) added in hw but is not being handled.
-gk20a/gm20b/gp10b
bit 24 eng_reset and bit 25 semaphore always existed in hw but never
handled
JIRA GPUT19X-47
Change-Id: I209191f57c5ea5b15081b7dc2411801d3537017c
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1325402
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 0c270910..5a0bd39e 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> | 26 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> |
27 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> | 27 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> |
28 | #include <nvgpu/hw/gm20b/hw_top_gm20b.h> | 28 | #include <nvgpu/hw/gm20b/hw_top_gm20b.h> |
29 | #include <nvgpu/hw/gm20b/hw_pbdma_gm20b.h> | ||
29 | 30 | ||
30 | static void channel_gm20b_bind(struct channel_gk20a *c) | 31 | static void channel_gm20b_bind(struct channel_gk20a *c) |
31 | { | 32 | { |
@@ -138,6 +139,51 @@ static void gm20b_device_info_data_parse(struct gk20a *g, | |||
138 | gk20a_err(g->dev, "unknown device_info_data %d", | 139 | gk20a_err(g->dev, "unknown device_info_data %d", |
139 | top_device_info_data_type_v(table_entry)); | 140 | top_device_info_data_type_v(table_entry)); |
140 | } | 141 | } |
142 | |||
143 | static void gm20b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) | ||
144 | { | ||
145 | /* | ||
146 | * These are all errors which indicate something really wrong | ||
147 | * going on in the device. | ||
148 | */ | ||
149 | f->intr.pbdma.device_fatal_0 = | ||
150 | pbdma_intr_0_memreq_pending_f() | | ||
151 | pbdma_intr_0_memack_timeout_pending_f() | | ||
152 | pbdma_intr_0_memack_extra_pending_f() | | ||
153 | pbdma_intr_0_memdat_timeout_pending_f() | | ||
154 | pbdma_intr_0_memdat_extra_pending_f() | | ||
155 | pbdma_intr_0_memflush_pending_f() | | ||
156 | pbdma_intr_0_memop_pending_f() | | ||
157 | pbdma_intr_0_lbconnect_pending_f() | | ||
158 | pbdma_intr_0_lback_timeout_pending_f() | | ||
159 | pbdma_intr_0_lback_extra_pending_f() | | ||
160 | pbdma_intr_0_lbdat_timeout_pending_f() | | ||
161 | pbdma_intr_0_lbdat_extra_pending_f() | | ||
162 | pbdma_intr_0_pri_pending_f(); | ||
163 | |||
164 | /* | ||
165 | * These are data parsing, framing errors or others which can be | ||
166 | * recovered from with intervention... or just resetting the | ||
167 | * channel | ||
168 | */ | ||
169 | f->intr.pbdma.channel_fatal_0 = | ||
170 | pbdma_intr_0_gpfifo_pending_f() | | ||
171 | pbdma_intr_0_gpptr_pending_f() | | ||
172 | pbdma_intr_0_gpentry_pending_f() | | ||
173 | pbdma_intr_0_gpcrc_pending_f() | | ||
174 | pbdma_intr_0_pbptr_pending_f() | | ||
175 | pbdma_intr_0_pbentry_pending_f() | | ||
176 | pbdma_intr_0_pbcrc_pending_f() | | ||
177 | pbdma_intr_0_method_pending_f() | | ||
178 | pbdma_intr_0_methodcrc_pending_f() | | ||
179 | pbdma_intr_0_pbseg_pending_f() | | ||
180 | pbdma_intr_0_signature_pending_f(); | ||
181 | |||
182 | /* Can be used for sw-methods, or represents a recoverable timeout. */ | ||
183 | f->intr.pbdma.restartable_0 = | ||
184 | pbdma_intr_0_device_pending_f(); | ||
185 | } | ||
186 | |||
141 | void gm20b_init_fifo(struct gpu_ops *gops) | 187 | void gm20b_init_fifo(struct gpu_ops *gops) |
142 | { | 188 | { |
143 | gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; | 189 | gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; |
@@ -176,4 +222,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) | |||
176 | gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; | 222 | gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; |
177 | gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; | 223 | gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; |
178 | gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; | 224 | gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; |
225 | gops->fifo.init_pbdma_intr_descs = gm20b_fifo_init_pbdma_intr_descs; | ||
179 | } | 226 | } |