gpu: nvgpu: Remove securegpccs flag from gpu_ops

Replace securegpccs boolean flag in gpu_ops with entry in
common flag system.

The new common flag is NVGPU_SEC_SECUREGPCCS

Jira NVGPU-74

Change-Id: I46430f95063f617531cf0e5aba472051b41f4a9d
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514060
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

3 files changed, 7 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index 1bc51a7c..0d69b5da 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -28,6 +28,7 @@
 #include <nvgpu/firmware.h>
 #include <nvgpu/pmu.h>
 #include <nvgpu/falcon.h>
+#include <nvgpu/enabled.h>
 
 #include <nvgpu/linux/dma.h>
 
@@ -267,7 +268,7 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img)
         struct nvgpu_firmware *gpccs_sig;
         int err;
 
-        if (g->ops.securegpccs == false)
+        if (!nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS))
                 return -ENOENT;
 
         gpccs_sig = nvgpu_request_firmware(g, T18x_GPCCS_UCODE_SIG, 0);
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index bd9b627f..5d9cc32c 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -758,7 +758,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
         g->ops.pmu.lsfloadedfalconid = 0;
         if (g->ops.pmu.fecsbootstrapdone) {
                 /* this must be recovery so bootstrap fecs and gpccs */
-                if (!g->ops.securegpccs) {
+                if (!nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS)) {
                         gr_gm20b_load_gpccs_with_bootloader(g);
                         err = g->ops.pmu.load_lsfalcon_ucode(g,
                                         (1 << LSF_FALCON_ID_FECS));
@@ -777,7 +777,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
         } else {
                 /* cold boot or rg exit */
                 g->ops.pmu.fecsbootstrapdone = true;
-                if (!g->ops.securegpccs) {
+                if (!nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS)) {
                         gr_gm20b_load_gpccs_with_bootloader(g);
                 } else {
                         /* bind WPR VA inst block */
@@ -797,7 +797,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
         }
 
         /*start gpccs */
-        if (g->ops.securegpccs) {
+        if (nvgpu_is_enabled(g, NVGPU_SEC_SECUREGPCCS)) {
                 gk20a_writel(g, reg_offset +
                         gr_fecs_cpuctl_alias_r(),
                         gr_gpccs_cpuctl_startcpu_f(1));
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 7415e6c1..01e277ce 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -351,8 +351,9 @@ int gm20b_init_hal(struct gk20a *g)
                 gm20b_ops.chip_init_gpu_characteristics;
         gops->get_litter_value = gm20b_ops.get_litter_value;
 
-        gops->securegpccs = false;
+        __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false);
         __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
+
 #ifdef CONFIG_TEGRA_ACR
         if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
                 gops->privsecurity = 1;