diff options
author | Sami Kiminki <skiminki@nvidia.com> | 2017-11-28 11:12:12 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-30 21:57:19 -0500 |
commit | d73ad6c07da23636c00c60effeeb53ea35847ee8 (patch) | |
tree | fc92c533909c84af308b10eb91a87e455e82dae4 /drivers/gpu/nvgpu/gm20b | |
parent | 86a94230c6d57803d572bfba726e1b02db0e3dc3 (diff) |
gpu: nvgpu: Alignment check for compressible fixed-address mappings
Add an alignment check for compressible-kind fixed-address
mappings. If we're using page size smaller than the comptag line
coverage window, the GPU VA and the physical buffer offset must be
aligned in respect to that window.
Bug 1995897
Bug 2011640
Bug 2011668
Change-Id: If68043ee2828d54b9398d77553d10d35cc319236
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1606439
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fb_gm20b.c | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fb_gm20b.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 1 |
3 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c index 1f8cc326..0157aa7a 100644 --- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c | |||
@@ -70,6 +70,11 @@ unsigned int gm20b_fb_compressible_page_size(struct gk20a *g) | |||
70 | return SZ_64K; | 70 | return SZ_64K; |
71 | } | 71 | } |
72 | 72 | ||
73 | u32 gm20b_fb_compression_align_mask(struct gk20a *g) | ||
74 | { | ||
75 | return SZ_64K - 1; | ||
76 | } | ||
77 | |||
73 | void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g) | 78 | void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g) |
74 | { | 79 | { |
75 | u32 val; | 80 | u32 val; |
diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.h b/drivers/gpu/nvgpu/gm20b/fb_gm20b.h index 32d36f57..1d1d5899 100644 --- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.h | |||
@@ -31,6 +31,7 @@ void gm20b_fb_set_mmu_page_size(struct gk20a *g); | |||
31 | bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g); | 31 | bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g); |
32 | unsigned int gm20b_fb_compression_page_size(struct gk20a *g); | 32 | unsigned int gm20b_fb_compression_page_size(struct gk20a *g); |
33 | unsigned int gm20b_fb_compressible_page_size(struct gk20a *g); | 33 | unsigned int gm20b_fb_compressible_page_size(struct gk20a *g); |
34 | u32 gm20b_fb_compression_align_mask(struct gk20a *g); | ||
34 | void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g); | 35 | void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g); |
35 | void gm20b_fb_read_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf); | 36 | void gm20b_fb_read_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf); |
36 | int gm20b_fb_vpr_info_fetch(struct gk20a *g); | 37 | int gm20b_fb_vpr_info_fetch(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 920a3e9b..3ef11d11 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -321,6 +321,7 @@ static const struct gpu_ops gm20b_ops = { | |||
321 | gm20b_fb_set_use_full_comp_tag_line, | 321 | gm20b_fb_set_use_full_comp_tag_line, |
322 | .compression_page_size = gm20b_fb_compression_page_size, | 322 | .compression_page_size = gm20b_fb_compression_page_size, |
323 | .compressible_page_size = gm20b_fb_compressible_page_size, | 323 | .compressible_page_size = gm20b_fb_compressible_page_size, |
324 | .compression_align_mask = gm20b_fb_compression_align_mask, | ||
324 | .vpr_info_fetch = gm20b_fb_vpr_info_fetch, | 325 | .vpr_info_fetch = gm20b_fb_vpr_info_fetch, |
325 | .dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info, | 326 | .dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info, |
326 | .read_wpr_info = gm20b_fb_read_wpr_info, | 327 | .read_wpr_info = gm20b_fb_read_wpr_info, |