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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-11-09 18:53:16 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2016-11-17 00:35:36 -0500
commitd29afd2c9e990799b470bb95a97935cf5b5020db (patch)
tree48f14dffe90956e9b42b02a87b95fd7a1dfeef3e /drivers/gpu/nvgpu/gm20b
parent5494e846c78dd0da74635905ead3abe45502375f (diff)
gpu: nvgpu: Fix signed comparison bugs
Fix small problems related to signed versus unsigned comparisons throughout the driver. Bump up the warning level to prevent such problems from occuring in future. Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1252068 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.c2
-rw-r--r--drivers/gpu/nvgpu/gm20b/fb_gm20b.c4
-rw-r--r--drivers/gpu/nvgpu/gm20b/fifo_gm20b.c2
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c6
-rw-r--r--drivers/gpu/nvgpu/gm20b/ltc_gm20b.c8
5 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index f9e2d477..1d0379c5 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -1185,7 +1185,7 @@ int acr_ucode_patch_sig(struct gk20a *g,
1185 unsigned int *p_patch_loc, 1185 unsigned int *p_patch_loc,
1186 unsigned int *p_patch_ind) 1186 unsigned int *p_patch_ind)
1187{ 1187{
1188 int i, *p_sig; 1188 unsigned int i, *p_sig;
1189 gm20b_dbg_pmu(""); 1189 gm20b_dbg_pmu("");
1190 1190
1191 if (!pmu_is_debug_mode_en(g)) { 1191 if (!pmu_is_debug_mode_en(g)) {
diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c
index c65cd450..ecc1d0d5 100644
--- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c
@@ -101,12 +101,12 @@ static bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g)
101 return true; 101 return true;
102} 102}
103 103
104static int gm20b_fb_compression_page_size(struct gk20a *g) 104static unsigned int gm20b_fb_compression_page_size(struct gk20a *g)
105{ 105{
106 return SZ_128K; 106 return SZ_128K;
107} 107}
108 108
109static int gm20b_fb_compressible_page_size(struct gk20a *g) 109static unsigned int gm20b_fb_compressible_page_size(struct gk20a *g)
110{ 110{
111 return SZ_64K; 111 return SZ_64K;
112} 112}
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
index 3b877db1..bb38a6f1 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
@@ -80,7 +80,7 @@ static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g,
80 } else { 80 } else {
81 u32 mmu_id = gm20b_engine_id_to_mmu_id(g, 81 u32 mmu_id = gm20b_engine_id_to_mmu_id(g,
82 engine_id); 82 engine_id);
83 if (mmu_id != ~0) 83 if (mmu_id != (u32)~0)
84 gk20a_writel(g, fifo_trigger_mmu_fault_r(mmu_id), 84 gk20a_writel(g, fifo_trigger_mmu_fault_r(mmu_id),
85 fifo_trigger_mmu_fault_enable_f(1)); 85 fifo_trigger_mmu_fault_enable_f(1));
86 } 86 }
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 56812fa6..cff0774d 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -548,11 +548,11 @@ static void gr_gm20b_load_tpc_mask(struct gk20a *g)
548 548
549 fuse_tpc_mask = g->ops.gr.get_gpc_tpc_mask(g, 0); 549 fuse_tpc_mask = g->ops.gr.get_gpc_tpc_mask(g, 0);
550 if (g->tpc_fs_mask_user && g->tpc_fs_mask_user != fuse_tpc_mask && 550 if (g->tpc_fs_mask_user && g->tpc_fs_mask_user != fuse_tpc_mask &&
551 fuse_tpc_mask == (0x1 << g->gr.max_tpc_count) - 1) { 551 fuse_tpc_mask == (0x1U << g->gr.max_tpc_count) - 1U) {
552 u32 val = g->tpc_fs_mask_user; 552 u32 val = g->tpc_fs_mask_user;
553 val &= (0x1 << g->gr.max_tpc_count) - 1; 553 val &= (0x1U << g->gr.max_tpc_count) - 1U;
554 /* skip tpc to disable the other tpc cause channel timeout */ 554 /* skip tpc to disable the other tpc cause channel timeout */
555 val = (0x1 << hweight32(val)) - 1; 555 val = (0x1U << hweight32(val)) - 1U;
556 gk20a_writel(g, gr_fe_tpc_fs_r(), val); 556 gk20a_writel(g, gr_fe_tpc_fs_r(), val);
557 } else { 557 } else {
558 gk20a_writel(g, gr_fe_tpc_fs_r(), pes_tpc_mask); 558 gk20a_writel(g, gr_fe_tpc_fs_r(), pes_tpc_mask);
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
index fee9a807..6cb238b7 100644
--- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
@@ -198,7 +198,7 @@ void gm20b_ltc_init_fs_state(struct gk20a *g)
198void gm20b_ltc_isr(struct gk20a *g) 198void gm20b_ltc_isr(struct gk20a *g)
199{ 199{
200 u32 mc_intr, ltc_intr; 200 u32 mc_intr, ltc_intr;
201 int ltc, slice; 201 unsigned int ltc, slice;
202 u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE); 202 u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE);
203 u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); 203 u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE);
204 204
@@ -227,8 +227,8 @@ void gm20b_ltc_g_elpg_flush_locked(struct gk20a *g)
227 u32 data; 227 u32 data;
228 bool done[g->ltc_count]; 228 bool done[g->ltc_count];
229 s32 retry = 100; 229 s32 retry = 100;
230 int i; 230 unsigned int i;
231 int num_done = 0; 231 unsigned int num_done = 0;
232 u32 ltc_d = ltc_ltc1_ltss_g_elpg_r() - ltc_ltc0_ltss_g_elpg_r(); 232 u32 ltc_d = ltc_ltc1_ltss_g_elpg_r() - ltc_ltc0_ltss_g_elpg_r();
233 233
234 gk20a_dbg_fn(""); 234 gk20a_dbg_fn("");
@@ -289,7 +289,7 @@ u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base)
289void gm20b_flush_ltc(struct gk20a *g) 289void gm20b_flush_ltc(struct gk20a *g)
290{ 290{
291 unsigned long timeout; 291 unsigned long timeout;
292 int ltc; 292 unsigned int ltc;
293 u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE); 293 u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE);
294 294
295#define __timeout_init() \ 295#define __timeout_init() \