gpu: nvgpu: rename mem_desc to nvgpu_mem

Renaming was done with the following command:

  $ find -type f | \
    xargs sed -i 's/struct mem_desc/struct nvgpu_mem/g'

Also rename mem_desc.[ch] to nvgpu_mem.[ch].

JIRA NVGPU-12

Change-Id: I69395758c22a56aa01e3dffbcded70a729bf559a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1325547
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

4 files changed, 9 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index da3adb72..013ce43a 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -59,14 +59,14 @@ static void lsfm_free_nonpmu_ucode_img_res(struct gk20a *g,
                                            struct flcn_ucode_img *p_img);
 static int lsf_gen_wpr_requirements(struct gk20a *g, struct ls_flcn_mgr *plsfm);
 static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm,
-        struct mem_desc *nonwpr);
+        struct nvgpu_mem *nonwpr);
 static void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr *plsfm);
 static int gm20b_pmu_populate_loader_cfg(struct gk20a *g,
         void *lsfm, u32 *p_bl_gen_desc_size);
 static int gm20b_flcn_populate_bl_dmem_desc(struct gk20a *g,
         void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid);
 static int gm20b_alloc_blob_space(struct gk20a *g,
-                size_t size, struct mem_desc *mem);
+                size_t size, struct nvgpu_mem *mem);
 static bool gm20b_is_priv_load(u32 falcon_id);
 static bool gm20b_is_lazy_bootstrap(u32 falcon_id);
 static void gm20b_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf);
@@ -364,7 +364,7 @@ static bool gm20b_is_priv_load(u32 falcon_id)
 }
 
 static int gm20b_alloc_blob_space(struct gk20a *g,
-                size_t size, struct mem_desc *mem)
+                size_t size, struct nvgpu_mem *mem)
 {
         int err;
 
@@ -707,7 +707,7 @@ static int lsfm_fill_flcn_bl_gen_desc(struct gk20a *g,
 
 /* Initialize WPR contents */
 static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm,
-        struct mem_desc *ucode)
+        struct nvgpu_mem *ucode)
 {
         struct lsfm_managed_ucode_img *pnode = plsfm->ucode_img_list;
         u32 i;
diff --git a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
index ba04945b..08761ef7 100644
--- a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
@@ -23,7 +23,7 @@
 
 #include <nvgpu/hw/gm20b/hw_bus_gm20b.h>
 
-static int gm20b_bus_bar1_bind(struct gk20a *g, struct mem_desc *bar1_inst)
+static int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
 {
         struct nvgpu_timeout timeout;
         int err = 0;
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 57bff64f..ab169a60 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -852,7 +852,7 @@ static int gr_gm20b_alloc_gr_ctx(struct gk20a *g,
 
 static void gr_gm20b_update_ctxsw_preemption_mode(struct gk20a *g,
                 struct channel_ctx_gk20a *ch_ctx,
-                struct mem_desc *mem)
+                struct nvgpu_mem *mem)
 {
         struct gr_ctx_desc *gr_ctx = ch_ctx->gr_ctx;
         u32 cta_preempt_option =
@@ -1012,7 +1012,7 @@ static int gr_gm20b_update_pc_sampling(struct channel_gk20a *c,
                                        bool enable)
 {
         struct channel_ctx_gk20a *ch_ctx = &c->ch_ctx;
-        struct mem_desc *mem;
+        struct nvgpu_mem *mem;
         u32 v;
 
         gk20a_dbg_fn("");
@@ -1108,7 +1108,7 @@ static void gr_gm20b_init_cyclestats(struct gk20a *g)
 #endif
 }
 
-static void gr_gm20b_enable_cde_in_fecs(struct gk20a *g, struct mem_desc *mem)
+static void gr_gm20b_enable_cde_in_fecs(struct gk20a *g, struct nvgpu_mem *mem)
 {
         u32 cde_v;
 
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index 08d446e7..bf3dd240 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -21,7 +21,7 @@
 #include <nvgpu/hw/gm20b/hw_ram_gm20b.h>
 
 static void gm20b_mm_set_big_page_size(struct gk20a *g,
-                                struct mem_desc *mem, int size)
+                                struct nvgpu_mem *mem, int size)
 {
         u32 val;