diff options
author | Alex Waterman <alexw@nvidia.com> | 2014-06-10 16:40:12 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:11 -0400 |
commit | bea4bb915a4a15042057a21170bcc2058f2bfb16 (patch) | |
tree | 175e9f29bbd9d5dea43e10f96730dddfe50cdf91 /drivers/gpu/nvgpu/gm20b | |
parent | ead2962f42a2c8772591b20c0e153d4ba7fb2203 (diff) |
gpu: nvgpu: Implement L2 flush in fifo recovery
Implement a full L2 flush (clean and invalidate) for gm20b in
the fifo recovery path.
Bug 1512176
Change-Id: Ibf89ede9cca65a6868ebff89825869053302a007
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/416435
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c index a5056289..1f9bf44c 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | |||
@@ -250,6 +250,53 @@ u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base) | |||
250 | return base; | 250 | return base; |
251 | } | 251 | } |
252 | 252 | ||
253 | /* | ||
254 | * Performs a full flush of the L2 cache. | ||
255 | */ | ||
256 | void gm20b_flush_ltc(struct gk20a *g) | ||
257 | { | ||
258 | u32 op_pending; | ||
259 | |||
260 | /* Clean... */ | ||
261 | gk20a_writel(g, ltc_ltcs_ltss_tstg_cmgmt1_r(), | ||
262 | ltc_ltcs_ltss_tstg_cmgmt1_clean_pending_f() | | ||
263 | ltc_ltcs_ltss_tstg_cmgmt1_max_cycles_between_cleans_3_f() | | ||
264 | ltc_ltcs_ltss_tstg_cmgmt1_clean_wait_for_fb_to_pull_true_f() | | ||
265 | ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_last_class_true_f() | | ||
266 | ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_normal_class_true_f() | | ||
267 | ltc_ltcs_ltss_tstg_cmgmt1_clean_evict_first_class_true_f()); | ||
268 | |||
269 | /* Wait on each LTC individually. */ | ||
270 | do { | ||
271 | op_pending = gk20a_readl(g, ltc_ltc0_ltss_tstg_cmgmt1_r()); | ||
272 | } while (op_pending & | ||
273 | ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_f()); | ||
274 | |||
275 | do { | ||
276 | op_pending = gk20a_readl(g, ltc_ltc1_ltss_tstg_cmgmt1_r()); | ||
277 | } while (op_pending & | ||
278 | ltc_ltc1_ltss_tstg_cmgmt1_clean_pending_f()); | ||
279 | |||
280 | /* And invalidate. */ | ||
281 | gk20a_writel(g, ltc_ltcs_ltss_tstg_cmgmt0_r(), | ||
282 | ltc_ltcs_ltss_tstg_cmgmt0_invalidate_pending_f() | | ||
283 | ltc_ltcs_ltss_tstg_cmgmt0_max_cycles_between_invalidates_3_f() | | ||
284 | ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_last_class_true_f() | | ||
285 | ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_normal_class_true_f() | | ||
286 | ltc_ltcs_ltss_tstg_cmgmt0_invalidate_evict_first_class_true_f()); | ||
287 | |||
288 | /* Wait on each LTC individually. */ | ||
289 | do { | ||
290 | op_pending = gk20a_readl(g, ltc_ltc0_ltss_tstg_cmgmt0_r()); | ||
291 | } while (op_pending & | ||
292 | ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_f()); | ||
293 | |||
294 | do { | ||
295 | op_pending = gk20a_readl(g, ltc_ltc1_ltss_tstg_cmgmt0_r()); | ||
296 | } while (op_pending & | ||
297 | ltc_ltc1_ltss_tstg_cmgmt0_invalidate_pending_f()); | ||
298 | } | ||
299 | |||
253 | void gm20b_init_ltc(struct gpu_ops *gops) | 300 | void gm20b_init_ltc(struct gpu_ops *gops) |
254 | { | 301 | { |
255 | /* Gk20a reused ops. */ | 302 | /* Gk20a reused ops. */ |
@@ -266,4 +313,5 @@ void gm20b_init_ltc(struct gpu_ops *gops) | |||
266 | gops->ltc.elpg_flush = gm20b_ltc_g_elpg_flush_locked; | 313 | gops->ltc.elpg_flush = gm20b_ltc_g_elpg_flush_locked; |
267 | gops->ltc.isr = gm20b_ltc_isr; | 314 | gops->ltc.isr = gm20b_ltc_isr; |
268 | gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config; | 315 | gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config; |
316 | gops->ltc.flush = gm20b_flush_ltc; | ||
269 | } | 317 | } |