gpu: nvgpu: Reorg mm HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
mm sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: Ieb87a62f047510e51c52e6563d8e3fd5a65b5f28
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537753
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 files changed, 36 insertions, 33 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index a540de64..073c377e 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -19,6 +19,7 @@
 #include "gk20a/fb_gk20a.h"
 #include "gk20a/fifo_gk20a.h"
 #include "gk20a/therm_gk20a.h"
+#include "gk20a/mm_gk20a.h"
 #include "gk20a/css_gr_gk20a.h"
 #include "gk20a/mc_gk20a.h"
 #include "gk20a/bus_gk20a.h"
@@ -287,6 +288,27 @@ static const struct gpu_ops gm20b_ops = {
                 .get_netlist_name = gr_gm20b_get_netlist_name,
                 .is_fw_defined = gr_gm20b_is_firmware_defined,
         },
+        .mm = {
+                .support_sparse = gm20b_mm_support_sparse,
+                .gmmu_map = gk20a_locked_gmmu_map,
+                .gmmu_unmap = gk20a_locked_gmmu_unmap,
+                .vm_bind_channel = gk20a_vm_bind_channel,
+                .fb_flush = gk20a_mm_fb_flush,
+                .l2_invalidate = gk20a_mm_l2_invalidate,
+                .l2_flush = gk20a_mm_l2_flush,
+                .cbc_clean = gk20a_mm_cbc_clean,
+                .set_big_page_size = gm20b_mm_set_big_page_size,
+                .get_big_page_sizes = gm20b_mm_get_big_page_sizes,
+                .get_default_big_page_size = gm20b_mm_get_default_big_page_size,
+                .gpu_phys_addr = gm20b_gpu_phys_addr,
+                .get_physical_addr_bits = gk20a_mm_get_physical_addr_bits,
+                .get_mmu_levels = gk20a_mm_get_mmu_levels,
+                .init_pdb = gk20a_mm_init_pdb,
+                .init_mm_setup_hw = gk20a_init_mm_setup_hw,
+                .is_bar1_supported = gm20b_mm_is_bar1_supported,
+                .init_inst_block = gk20a_init_inst_block,
+                .mmu_fault_pending = gk20a_fifo_mmu_fault_pending,
+        },
         .therm = {
                 .init_therm_setup_hw = gm20b_init_therm_setup_hw,
                 .elcg_init_idle_filters = gk20a_elcg_init_idle_filters,
@@ -398,6 +420,7 @@ int gm20b_init_hal(struct gk20a *g)
         gops->clock_gating = gm20b_ops.clock_gating;
         gops->fifo = gm20b_ops.fifo;
         gops->gr_ctx = gm20b_ops.gr_ctx;
+        gops->mm = gm20b_ops.mm;
         gops->therm = gm20b_ops.therm;
         /*
          * clk must be assigned member by member
@@ -462,7 +485,6 @@ int gm20b_init_hal(struct gk20a *g)
 #endif
         g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT;
         gm20b_init_gr(g);
-        gm20b_init_mm(gops);
         gm20b_init_pmu_ops(g);
 
         gm20b_init_uncompressed_kind_map();
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index bbcd6314..05752f03 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -20,7 +20,7 @@
 #include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h>
 #include <nvgpu/hw/gm20b/hw_ram_gm20b.h>
 
-static void gm20b_mm_set_big_page_size(struct gk20a *g,
+void gm20b_mm_set_big_page_size(struct gk20a *g,
                                 struct nvgpu_mem *mem, int size)
 {
         u32 val;
@@ -40,22 +40,22 @@ static void gm20b_mm_set_big_page_size(struct gk20a *g,
         gk20a_dbg_fn("done");
 }
 
-static u32 gm20b_mm_get_big_page_sizes(void)
+u32 gm20b_mm_get_big_page_sizes(void)
 {
         return SZ_64K | SZ_128K;
 }
 
-static u32 gm20b_mm_get_default_big_page_size(void)
+u32 gm20b_mm_get_default_big_page_size(void)
 {
         return SZ_128K;
 }
 
-static bool gm20b_mm_support_sparse(struct gk20a *g)
+bool gm20b_mm_support_sparse(struct gk20a *g)
 {
         return true;
 }
 
-static bool gm20b_mm_is_bar1_supported(struct gk20a *g)
+bool gm20b_mm_is_bar1_supported(struct gk20a *g)
 {
         return true;
 }
@@ -65,26 +65,3 @@ u64 gm20b_gpu_phys_addr(struct gk20a *g,
 {
         return phys;
 }
-
-void gm20b_init_mm(struct gpu_ops *gops)
-{
-        gops->mm.support_sparse = gm20b_mm_support_sparse;
-        gops->mm.gmmu_map = gk20a_locked_gmmu_map;
-        gops->mm.gmmu_unmap = gk20a_locked_gmmu_unmap;
-        gops->mm.vm_bind_channel = gk20a_vm_bind_channel;
-        gops->mm.fb_flush = gk20a_mm_fb_flush;
-        gops->mm.l2_invalidate = gk20a_mm_l2_invalidate;
-        gops->mm.l2_flush = gk20a_mm_l2_flush;
-        gops->mm.cbc_clean = gk20a_mm_cbc_clean;
-        gops->mm.set_big_page_size = gm20b_mm_set_big_page_size;
-        gops->mm.get_big_page_sizes = gm20b_mm_get_big_page_sizes;
-        gops->mm.get_default_big_page_size = gm20b_mm_get_default_big_page_size;
-        gops->mm.gpu_phys_addr = gm20b_gpu_phys_addr;
-        gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits;
-        gops->mm.get_mmu_levels = gk20a_mm_get_mmu_levels;
-        gops->mm.init_pdb = gk20a_mm_init_pdb;
-        gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw;
-        gops->mm.is_bar1_supported = gm20b_mm_is_bar1_supported;
-        gops->mm.init_inst_block = gk20a_init_inst_block;
-        gops->mm.mmu_fault_pending = gk20a_fifo_mmu_fault_pending;
-}
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.h b/drivers/gpu/nvgpu/gm20b/mm_gm20b.h
index 2bb29ea8..b1bb38a3 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.h
@@ -1,7 +1,7 @@
 /*
  * GM20B GMMU
  *
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -20,9 +20,13 @@ struct gk20a;
 #define PDE_ADDR_START(x, y)    ((x) &  ~((0x1UL << (y)) - 1))
 #define PDE_ADDR_END(x, y)      ((x) | ((0x1UL << (y)) - 1))
 
+void gm20b_mm_set_big_page_size(struct gk20a *g,
+                                struct nvgpu_mem *mem, int size);
+u32 gm20b_mm_get_big_page_sizes(void);
+u32 gm20b_mm_get_default_big_page_size(void);
+bool gm20b_mm_support_sparse(struct gk20a *g);
+bool gm20b_mm_is_bar1_supported(struct gk20a *g);
+int gm20b_mm_mmu_vpr_info_fetch(struct gk20a *g);
 u64 gm20b_gpu_phys_addr(struct gk20a *g,
                         struct nvgpu_gmmu_attrs *attrs, u64 phys);
-
-void gm20b_init_mm(struct gpu_ops *gops);
-int gm20b_mm_mmu_vpr_info_fetch(struct gk20a *g);
 #endif