summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gm20b
diff options
context:
space:
mode:
authorKevin Huang <kevinh@nvidia.com>2014-07-23 16:52:48 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:10:53 -0400
commit87373abc9598bf5c57f429ea246497d3019a6034 (patch)
treef67b504b391c1c7d1e39183135d983f30525bd9d /drivers/gpu/nvgpu/gm20b
parent92c9a2d06e6caa3c2521f1851b4933d7e90856f2 (diff)
gpu: nvgpu: gm20b: use gpc_mmu to check debug mode
Bug 1534793 Change-Id: I8a4c35914b58dd13a7c10c668de9d4662d947d8c Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/441377 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h8
-rw-r--r--drivers/gpu/nvgpu/gm20b/mm_gm20b.c9
2 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
index eb6cf4ad..21a46d33 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
@@ -3210,6 +3210,14 @@ static inline u32 gr_gpcs_pri_mmu_debug_ctrl_r(void)
3210{ 3210{
3211 return 0x004188b0; 3211 return 0x004188b0;
3212} 3212}
3213static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_v(u32 r)
3214{
3215 return (r >> 16) & 0x1;
3216}
3217static inline u32 gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_v(void)
3218{
3219 return 0x00000001;
3220}
3213static inline u32 gr_gpcs_pri_mmu_debug_wr_r(void) 3221static inline u32 gr_gpcs_pri_mmu_debug_wr_r(void)
3214{ 3222{
3215 return 0x004188b4; 3223 return 0x004188b4;
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index a16f4adf..ac82d56a 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -18,6 +18,7 @@
18#include "mm_gm20b.h" 18#include "mm_gm20b.h"
19#include "hw_gmmu_gm20b.h" 19#include "hw_gmmu_gm20b.h"
20#include "hw_fb_gm20b.h" 20#include "hw_fb_gm20b.h"
21#include "hw_gr_gm20b.h"
21 22
22static const u32 gmmu_page_sizes[gmmu_nr_page_sizes] = { SZ_4K, SZ_128K }; 23static const u32 gmmu_page_sizes[gmmu_nr_page_sizes] = { SZ_4K, SZ_128K };
23static const u32 gmmu_page_shifts[gmmu_nr_page_sizes] = { 12, 17 }; 24static const u32 gmmu_page_shifts[gmmu_nr_page_sizes] = { 12, 17 };
@@ -314,8 +315,16 @@ void gm20b_vm_clear_sparse(struct vm_gk20a *vm, u64 vaddr,
314 return; 315 return;
315} 316}
316 317
318bool gm20b_mm_mmu_debug_mode_enabled(struct gk20a *g)
319{
320 u32 debug_ctrl = gk20a_readl(g, gr_gpcs_pri_mmu_debug_ctrl_r());
321 return gr_gpcs_pri_mmu_debug_ctrl_debug_v(debug_ctrl) ==
322 gr_gpcs_pri_mmu_debug_ctrl_debug_enabled_v();
323}
324
317void gm20b_init_mm(struct gpu_ops *gops) 325void gm20b_init_mm(struct gpu_ops *gops)
318{ 326{
319 gops->mm.set_sparse = gm20b_vm_put_sparse; 327 gops->mm.set_sparse = gm20b_vm_put_sparse;
320 gops->mm.clear_sparse = gm20b_vm_clear_sparse; 328 gops->mm.clear_sparse = gm20b_vm_clear_sparse;
329 gops->mm.is_debug_mode_enabled = gm20b_mm_mmu_debug_mode_enabled;
321} 330}