gpu: nvgpu: LRF, TEX, LTC, DRAM override

- Adding support for FECS mem overrides

Bug 1699676

Change-Id: I6c9ddcd98d57b29059513ee508c6f92b194c4fc7
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/921253
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 files changed, 14 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index ee64b90f..9f137246 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -1300,6 +1300,8 @@ static int gm20b_init_pmu_setup_hw1(struct gk20a *g,
         pmu_enable_irq(pmu, false);
         pmu->isr_enabled = false;
         mutex_unlock(&pmu->isr_mutex);
+        /*Clearing mailbox register used to reflect capabilities*/
+        gk20a_writel(g, pwr_falcon_mailbox1_r(), 0);
         err = bl_bootstrap(pmu, desc, bl_sz);
         if (err)
                 return err;
@@ -1436,6 +1438,8 @@ int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout)
         if (completion)
                 gk20a_err(dev_from_gk20a(g), "ACR boot timed out");
         else {
+                g->acr.capabilities = gk20a_readl(g, pwr_falcon_mailbox1_r());
+                gm20b_dbg_pmu("ACR capabilities %x\n", g->acr.capabilities);
                 data = gk20a_readl(g, pwr_falcon_mailbox0_r());
                 if (data) {
                         gk20a_err(dev_from_gk20a(g),
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
index 58800c09..414e22b6 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
@@ -1,7 +1,7 @@
 /*
  * GM20B ACR
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -124,6 +124,10 @@
 #define FLCN_NL_UCODE_HDR_OS_OVL_SIZE_IND(N) \
         (FLCN_NL_UCODE_HDR_APP_DATA_END_IND(N) + 2)
 
+enum acr_capabilities {
+        ACR_LRF_TEX_LTC_DRAM_PRIV_MASK_ENABLE_LS_OVERRIDE =     (0x00000001),
+};
+
 /*Externs*/
 
 /*Structs*/
@@ -397,6 +401,7 @@ struct acr_gm20b {
         struct flcn_bl_dmem_desc bl_dmem_desc;
         const struct firmware *pmu_fw;
         const struct firmware *pmu_desc;
+        u32 capabilities;
 };
 
 void gm20b_init_secure_pmu(struct gpu_ops *gops);
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 2a891647..67654cba 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1232,4 +1232,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
         gops->gr.mask_hww_warp_esr = gk20a_mask_hww_warp_esr;
         gops->gr.handle_sm_exception = gr_gk20a_handle_sm_exception;
         gops->gr.handle_tex_exception = gr_gk20a_handle_tex_exception;
+        gops->gr.get_lrf_tex_ltc_dram_override = NULL;
 }
diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
index 4123e32a..ce3da2b6 100644
--- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
@@ -1,7 +1,7 @@
 /*
  * GM20B PMU
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
 *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -308,4 +308,5 @@ void gm20b_init_pmu_ops(struct gpu_ops *gops)
         gops->pmu.write_dmatrfbase = gm20b_write_dmatrfbase;
         gops->pmu.pmu_elpg_statistics = gk20a_pmu_elpg_statistics;
         gops->pmu.pmu_pg_grinit_param = NULL;
+        gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL;
 }