gpu: nvgpu: Implement priv pages

Implement support for privileged pages. Use them for kernel allocated buffers.

Change-Id: I720fc441008077b8e2ed218a7a685b8aab2258f0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/761919

2 files changed, 14 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index a238c523..3a19d6b6 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -333,7 +333,7 @@ int prepare_ucode_blob(struct gk20a *g)
         sg_dma_address(sgt->sgl) = 0;
 
         g->pmu.wpr_buf.gpu_va = gk20a_gmmu_map(vm, &sgt, wprsize,
-                                                0, gk20a_mem_flag_none);
+                                                0, gk20a_mem_flag_none, false);
         gm20b_dbg_pmu("wpr mapped gpu va :%llx\n", g->pmu.wpr_buf.gpu_va);
 
         /* Discover all managed falcons*/
@@ -1323,7 +1323,7 @@ int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt)
                 acr->hsbl_ucode.gpu_va = gk20a_gmmu_map(vm, &acr->hsbl_ucode.sgt,
                                 bl_sz,
                                 0, /* flags */
-                                gk20a_mem_flag_read_only);
+                                gk20a_mem_flag_read_only, false);
                 if (!acr->hsbl_ucode.gpu_va) {
                         gk20a_err(d, "failed to map pmu ucode memory!!");
                         goto err_free_ucode;
diff --git a/drivers/gpu/nvgpu/gm20b/hw_gmmu_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_gmmu_gm20b.h
index 9a1c0e71..32b65912 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_gmmu_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_gmmu_gm20b.h
@@ -146,6 +146,18 @@ static inline u32 gmmu_pte_valid_false_f(void)
 {
         return 0x0;
 }
+static inline u32 gmmu_pte_privilege_w(void)
+{
+        return 0;
+}
+static inline u32 gmmu_pte_privilege_true_f(void)
+{
+        return 0x2;
+}
+static inline u32 gmmu_pte_privilege_false_f(void)
+{
+        return 0x0;
+}
 static inline u32 gmmu_pte_address_sys_f(u32 v)
 {
         return (v & 0xfffffff) << 4;