diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2016-04-20 08:07:48 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-23 13:34:30 -0400 |
commit | 5765694f2a5eb52ad8710667821e381b233a70fd (patch) | |
tree | fe69f3b6eec57326c5dd826cdf90e0c92ff5c240 /drivers/gpu/nvgpu/gm20b | |
parent | 26b0037dc691bd61f15d69dd67083b00c4fdaf1b (diff) |
gpu: nvgpu: do not include hw_proj_*.h
hw_proj_gk20a.h and hw_proj_gm20b.h should not be
included, hence remove the includes and APIs used
from the header
Use nvgpu_get_litter_value() API to replace use
of header
Bug 200156699
Change-Id: I5e88f71657682dd94ac7f0a45f940b70cf8222e7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1129611
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 9d269365..40925f48 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include "hw_fuse_gm20b.h" | 31 | #include "hw_fuse_gm20b.h" |
32 | #include "pmu_gm20b.h" | 32 | #include "pmu_gm20b.h" |
33 | #include "acr_gm20b.h" | 33 | #include "acr_gm20b.h" |
34 | #include "hw_proj_gm20b.h" | ||
35 | 34 | ||
36 | static void gr_gm20b_init_gpc_mmu(struct gk20a *g) | 35 | static void gr_gm20b_init_gpc_mmu(struct gk20a *g) |
37 | { | 36 | { |
@@ -1195,8 +1194,10 @@ static int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc) | |||
1195 | { | 1194 | { |
1196 | int sm_id; | 1195 | int sm_id; |
1197 | struct gr_gk20a *gr = &g->gr; | 1196 | struct gr_gk20a *gr = &g->gr; |
1198 | u32 offset = proj_gpc_stride_v() * gpc + | 1197 | u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); |
1199 | proj_tpc_in_gpc_stride_v() * tpc; | 1198 | u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, |
1199 | GPU_LIT_TPC_IN_GPC_STRIDE); | ||
1200 | u32 offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc; | ||
1200 | 1201 | ||
1201 | mutex_lock(&g->dbg_sessions_lock); | 1202 | mutex_lock(&g->dbg_sessions_lock); |
1202 | 1203 | ||
@@ -1226,6 +1227,9 @@ static int gm20b_gr_update_sm_error_state(struct gk20a *g, | |||
1226 | u32 gpc, tpc, offset; | 1227 | u32 gpc, tpc, offset; |
1227 | struct gr_gk20a *gr = &g->gr; | 1228 | struct gr_gk20a *gr = &g->gr; |
1228 | struct channel_ctx_gk20a *ch_ctx = &ch->ch_ctx; | 1229 | struct channel_ctx_gk20a *ch_ctx = &ch->ch_ctx; |
1230 | u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); | ||
1231 | u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, | ||
1232 | GPU_LIT_TPC_IN_GPC_STRIDE); | ||
1229 | int err = 0; | 1233 | int err = 0; |
1230 | 1234 | ||
1231 | mutex_lock(&g->dbg_sessions_lock); | 1235 | mutex_lock(&g->dbg_sessions_lock); |
@@ -1250,8 +1254,7 @@ static int gm20b_gr_update_sm_error_state(struct gk20a *g, | |||
1250 | gpc = g->gr.sm_to_cluster[sm_id].gpc_index; | 1254 | gpc = g->gr.sm_to_cluster[sm_id].gpc_index; |
1251 | tpc = g->gr.sm_to_cluster[sm_id].tpc_index; | 1255 | tpc = g->gr.sm_to_cluster[sm_id].tpc_index; |
1252 | 1256 | ||
1253 | offset = proj_gpc_stride_v() * gpc + | 1257 | offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc; |
1254 | proj_tpc_in_gpc_stride_v() * tpc; | ||
1255 | 1258 | ||
1256 | if (gk20a_is_channel_ctx_resident(ch)) { | 1259 | if (gk20a_is_channel_ctx_resident(ch)) { |
1257 | gk20a_writel(g, gr_gpc0_tpc0_sm_hww_global_esr_r() + offset, | 1260 | gk20a_writel(g, gr_gpc0_tpc0_sm_hww_global_esr_r() + offset, |
@@ -1295,6 +1298,9 @@ static int gm20b_gr_clear_sm_error_state(struct gk20a *g, | |||
1295 | u32 gpc, tpc, offset; | 1298 | u32 gpc, tpc, offset; |
1296 | u32 val; | 1299 | u32 val; |
1297 | struct gr_gk20a *gr = &g->gr; | 1300 | struct gr_gk20a *gr = &g->gr; |
1301 | u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE); | ||
1302 | u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, | ||
1303 | GPU_LIT_TPC_IN_GPC_STRIDE); | ||
1298 | int err = 0; | 1304 | int err = 0; |
1299 | 1305 | ||
1300 | mutex_lock(&g->dbg_sessions_lock); | 1306 | mutex_lock(&g->dbg_sessions_lock); |
@@ -1311,8 +1317,7 @@ static int gm20b_gr_clear_sm_error_state(struct gk20a *g, | |||
1311 | gpc = g->gr.sm_to_cluster[sm_id].gpc_index; | 1317 | gpc = g->gr.sm_to_cluster[sm_id].gpc_index; |
1312 | tpc = g->gr.sm_to_cluster[sm_id].tpc_index; | 1318 | tpc = g->gr.sm_to_cluster[sm_id].tpc_index; |
1313 | 1319 | ||
1314 | offset = proj_gpc_stride_v() * gpc + | 1320 | offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc; |
1315 | proj_tpc_in_gpc_stride_v() * tpc; | ||
1316 | 1321 | ||
1317 | val = gk20a_readl(g, gr_gpc0_tpc0_sm_hww_global_esr_r() + offset); | 1322 | val = gk20a_readl(g, gr_gpc0_tpc0_sm_hww_global_esr_r() + offset); |
1318 | gk20a_writel(g, gr_gpc0_tpc0_sm_hww_global_esr_r() + offset, | 1323 | gk20a_writel(g, gr_gpc0_tpc0_sm_hww_global_esr_r() + offset, |