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authorTerje Bergstrom <tbergstrom@nvidia.com>2014-11-05 03:12:17 -0500
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:12:06 -0400
commit2c23d1066f947e697240f5e61529c5b48407fa08 (patch)
tree6f9bebc525a516d19ded1e3e7ae4b6067953e8b8 /drivers/gpu/nvgpu/gm20b
parent88c760b2eac861298535dac6df89b8a14152efe9 (diff)
gpu: nvgpu: Add class numbers to characteristics
Some kernel APIs rely on user space knowing class numbers. Allow querying the numbers from kernel. Bug 1567274 Change-Id: Idec2fe8ee983ee74bcbf9dfc98f71bbcc1492cfb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/594402
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.h8
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c12
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.h4
3 files changed, 18 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
index 8348b9d9..470e5bae 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
@@ -18,9 +18,11 @@
18struct gk20a; 18struct gk20a;
19 19
20enum { 20enum {
21 MAXWELL_B = 0xB197, 21 MAXWELL_B = 0xB197,
22 MAXWELL_COMPUTE_B = 0xB1C0, 22 MAXWELL_COMPUTE_B = 0xB1C0,
23 MAXWELL_DMA_COPY_A = 0xB0B5, 23 KEPLER_INLINE_TO_MEMORY_B= 0xA140,
24 MAXWELL_DMA_COPY_A = 0xB0B5,
25 MAXWELL_CHANNEL_GPFIFO_A= 0xB06F,
24}; 26};
25 27
26#define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc 28#define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 2b534816..e95f8878 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -83,8 +83,11 @@ static struct gpu_ops gm20b_ops = {
83 } 83 }
84}; 84};
85 85
86int gm20b_init_hal(struct gpu_ops *gops) 86int gm20b_init_hal(struct gk20a *g)
87{ 87{
88 struct gpu_ops *gops = &g->ops;
89 struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics;
90
88 *gops = gm20b_ops; 91 *gops = gm20b_ops;
89#ifdef CONFIG_TEGRA_ACR 92#ifdef CONFIG_TEGRA_ACR
90 if (tegra_platform_is_linsim()) { 93 if (tegra_platform_is_linsim()) {
@@ -127,5 +130,12 @@ int gm20b_init_hal(struct gpu_ops *gops)
127 gm20b_init_regops(gops); 130 gm20b_init_regops(gops);
128 gops->name = "gm20b"; 131 gops->name = "gm20b";
129 132
133 c->twod_class = FERMI_TWOD_A;
134 c->threed_class = MAXWELL_B;
135 c->compute_class = MAXWELL_COMPUTE_B;
136 c->gpfifo_class = MAXWELL_CHANNEL_GPFIFO_A;
137 c->inline_to_memory_class = KEPLER_INLINE_TO_MEMORY_B;
138 c->dma_copy_class = MAXWELL_DMA_COPY_A;
139
130 return 0; 140 return 0;
131} 141}
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.h b/drivers/gpu/nvgpu/gm20b/hal_gm20b.h
index 99e193fc..2416876d 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.h
@@ -15,7 +15,7 @@
15 15
16#ifndef _NVHOST_HAL_GM20B_H 16#ifndef _NVHOST_HAL_GM20B_H
17#define _NVHOST_HAL_GM20B_H 17#define _NVHOST_HAL_GM20B_H
18struct gpu_ops; 18struct gk20a;
19 19
20int gm20b_init_hal(struct gpu_ops *gops); 20int gm20b_init_hal(struct gk20a *g);
21#endif 21#endif