summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gm20b
diff options
context:
space:
mode:
authorAlex Waterman <alexw@nvidia.com>2017-10-06 14:30:29 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-24 18:16:49 -0400
commit2a285d0607a20694476399f5719e74dbc26fcd58 (patch)
treeef0246e3ca7b933ce3ea4c74061f61cc2e394b8b /drivers/gpu/nvgpu/gm20b
parent748331cbab1c7af26ab1fbae5ead2cdaff22806a (diff)
gpu: nvgpu: Cleanup generic MM code in gk20a/mm_gk20a.c
Move much of the remaining generic MM code to a new common location: common/mm/mm.c. Also add a corresponding <nvgpu/mm.h> header. This mostly consists of init and cleanup code to handle the common MM data structures like the VIDMEM code, address spaces for various engines, etc. A few more indepth changes were made as well. 1. alloc_inst_block() has been added to the MM HAL. This used to be defined directly in the gk20a code but it used a register. As a result, if this register hypothetically changes in the future, it would need to become a HAL anyway. This path preempts that and for now just defines all HALs to use the gk20a version. 2. Rename as much as possible: global functions are, for the most part, prepended with nvgpu (there are a few exceptions which I have yet to decide what to do with). Functions that are static are renamed to be as consistent with their functionality as possible since in some cases function effect and function name have diverged. JIRA NVGPU-30 Change-Id: Ic948f1ecc2f7976eba4bb7169a44b7226bb7c0b5 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1574499 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.c4
-rw-r--r--drivers/gpu/nvgpu/gm20b/bus_gm20b.c5
-rw-r--r--drivers/gpu/nvgpu/gm20b/fifo_gm20b.c3
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c1
4 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index 7029b477..557948e1 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -21,7 +21,6 @@
21 */ 21 */
22 22
23#include <nvgpu/types.h> 23#include <nvgpu/types.h>
24
25#include <nvgpu/dma.h> 24#include <nvgpu/dma.h>
26#include <nvgpu/gmmu.h> 25#include <nvgpu/gmmu.h>
27#include <nvgpu/timers.h> 26#include <nvgpu/timers.h>
@@ -33,6 +32,7 @@
33#include <nvgpu/pmu.h> 32#include <nvgpu/pmu.h>
34#include <nvgpu/falcon.h> 33#include <nvgpu/falcon.h>
35#include <nvgpu/enabled.h> 34#include <nvgpu/enabled.h>
35#include <nvgpu/mm.h>
36 36
37#include "gk20a/gk20a.h" 37#include "gk20a/gk20a.h"
38#include "gk20a/pmu_gk20a.h" 38#include "gk20a/pmu_gk20a.h"
@@ -1170,7 +1170,7 @@ static int bl_bootstrap(struct nvgpu_pmu *pmu,
1170 pwr_falcon_itfen_ctxen_enable_f()); 1170 pwr_falcon_itfen_ctxen_enable_f());
1171 gk20a_writel(g, pwr_pmu_new_instblk_r(), 1171 gk20a_writel(g, pwr_pmu_new_instblk_r(),
1172 pwr_pmu_new_instblk_ptr_f( 1172 pwr_pmu_new_instblk_ptr_f(
1173 gk20a_mm_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | 1173 nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) |
1174 pwr_pmu_new_instblk_valid_f(1) | 1174 pwr_pmu_new_instblk_valid_f(1) |
1175 pwr_pmu_new_instblk_target_sys_coh_f()); 1175 pwr_pmu_new_instblk_target_sys_coh_f());
1176 1176
diff --git a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
index b8d42f7a..34c8d4b7 100644
--- a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
@@ -24,6 +24,7 @@
24 24
25#include <nvgpu/timers.h> 25#include <nvgpu/timers.h>
26#include <nvgpu/bus.h> 26#include <nvgpu/bus.h>
27#include <nvgpu/mm.h>
27 28
28#include "bus_gm20b.h" 29#include "bus_gm20b.h"
29#include "gk20a/gk20a.h" 30#include "gk20a/gk20a.h"
@@ -35,8 +36,8 @@ int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
35{ 36{
36 struct nvgpu_timeout timeout; 37 struct nvgpu_timeout timeout;
37 int err = 0; 38 int err = 0;
38 u64 iova = gk20a_mm_inst_block_addr(g, bar1_inst); 39 u64 iova = nvgpu_inst_block_addr(g, bar1_inst);
39 u32 ptr_v = (u32)(iova >> bar1_instance_block_shift_gk20a()); 40 u32 ptr_v = (u32)(iova >> bus_bar1_block_ptr_shift_v());
40 41
41 gk20a_dbg_info("bar1 inst block ptr: 0x%08x", ptr_v); 42 gk20a_dbg_info("bar1 inst block ptr: 0x%08x", ptr_v);
42 43
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
index f4ddd92f..0762e8bd 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
@@ -31,6 +31,7 @@
31#include <nvgpu/log.h> 31#include <nvgpu/log.h>
32#include <nvgpu/atomic.h> 32#include <nvgpu/atomic.h>
33#include <nvgpu/barrier.h> 33#include <nvgpu/barrier.h>
34#include <nvgpu/mm.h>
34 35
35#include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h> 36#include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h>
36#include <nvgpu/hw/gm20b/hw_ram_gm20b.h> 37#include <nvgpu/hw/gm20b/hw_ram_gm20b.h>
@@ -42,7 +43,7 @@ void channel_gm20b_bind(struct channel_gk20a *c)
42{ 43{
43 struct gk20a *g = c->g; 44 struct gk20a *g = c->g;
44 45
45 u32 inst_ptr = gk20a_mm_inst_block_addr(g, &c->inst_block) 46 u32 inst_ptr = nvgpu_inst_block_addr(g, &c->inst_block)
46 >> ram_in_base_shift_v(); 47 >> ram_in_base_shift_v();
47 48
48 gk20a_dbg_info("bind channel %d inst ptr 0x%08x", 49 gk20a_dbg_info("bind channel %d inst ptr 0x%08x",
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 269fd7f1..d081fb24 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -442,6 +442,7 @@ static const struct gpu_ops gm20b_ops = {
442 .init_pdb = gk20a_mm_init_pdb, 442 .init_pdb = gk20a_mm_init_pdb,
443 .init_mm_setup_hw = gk20a_init_mm_setup_hw, 443 .init_mm_setup_hw = gk20a_init_mm_setup_hw,
444 .is_bar1_supported = gm20b_mm_is_bar1_supported, 444 .is_bar1_supported = gm20b_mm_is_bar1_supported,
445 .alloc_inst_block = gk20a_alloc_inst_block,
445 .init_inst_block = gk20a_init_inst_block, 446 .init_inst_block = gk20a_init_inst_block,
446 .mmu_fault_pending = gk20a_fifo_mmu_fault_pending, 447 .mmu_fault_pending = gk20a_fifo_mmu_fault_pending,
447 .get_kind_invalid = gm20b_get_kind_invalid, 448 .get_kind_invalid = gm20b_get_kind_invalid,