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authorAingara Paramakuru <aparamakuru@nvidia.com>2014-05-05 21:14:22 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:11:01 -0400
commit1fd722f592c2e0523c5e399a2406a4e387057188 (patch)
tree3425fb1a08ec2ccc6397e39c73a5579117e00a05 /drivers/gpu/nvgpu/gm20b
parent69e0cd3dfd8f39bc8d3529325001dcacd774f669 (diff)
gpu: nvgpu: support gk20a virtualization
The nvgpu driver now supports using the Tegra graphics virtualization interfaces to support gk20a in a virtualized environment. Bug 1509608 Change-Id: I6ede15ee7bf0b0ad8a13e8eb5f557c3516ead676 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/440122 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/fifo_gm20b.c9
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c5
-rw-r--r--drivers/gpu/nvgpu/gm20b/mm_gm20b.c9
3 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
index 7e580136..86d049cf 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
@@ -102,5 +102,14 @@ static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g,
102void gm20b_init_fifo(struct gpu_ops *gops) 102void gm20b_init_fifo(struct gpu_ops *gops)
103{ 103{
104 gops->fifo.bind_channel = channel_gm20b_bind; 104 gops->fifo.bind_channel = channel_gm20b_bind;
105 gops->fifo.unbind_channel = channel_gk20a_unbind;
106 gops->fifo.disable_channel = channel_gk20a_disable;
107 gops->fifo.alloc_inst = channel_gk20a_alloc_inst;
108 gops->fifo.free_inst = channel_gk20a_free_inst;
109 gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc;
110
111 gops->fifo.preempt_channel = gk20a_fifo_preempt_channel;
112 gops->fifo.update_runlist = gk20a_fifo_update_runlist;
105 gops->fifo.trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault; 113 gops->fifo.trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault;
114 gops->fifo.wait_engine_idle = gk20a_fifo_wait_engine_idle;
106} 115}
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 72500b0e..c9c32b9f 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -751,4 +751,9 @@ void gm20b_init_gr(struct gpu_ops *gops)
751 gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode; 751 gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode;
752#endif 752#endif
753 gops->gr.get_gpc_tpc_mask = gr_gm20b_get_gpc_tpc_mask; 753 gops->gr.get_gpc_tpc_mask = gr_gm20b_get_gpc_tpc_mask;
754 gops->gr.free_channel_ctx = gk20a_free_channel_ctx;
755 gops->gr.alloc_obj_ctx = gk20a_alloc_obj_ctx;
756 gops->gr.free_obj_ctx = gk20a_free_obj_ctx;
757 gops->gr.bind_ctxsw_zcull = gr_gk20a_bind_ctxsw_zcull;
758 gops->gr.get_zcull_info = gr_gk20a_get_zcull_info;
754} 759}
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index ac82d56a..ed5b5e0d 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -327,4 +327,13 @@ void gm20b_init_mm(struct gpu_ops *gops)
327 gops->mm.set_sparse = gm20b_vm_put_sparse; 327 gops->mm.set_sparse = gm20b_vm_put_sparse;
328 gops->mm.clear_sparse = gm20b_vm_clear_sparse; 328 gops->mm.clear_sparse = gm20b_vm_clear_sparse;
329 gops->mm.is_debug_mode_enabled = gm20b_mm_mmu_debug_mode_enabled; 329 gops->mm.is_debug_mode_enabled = gm20b_mm_mmu_debug_mode_enabled;
330 gops->mm.gmmu_map = gk20a_locked_gmmu_map;
331 gops->mm.gmmu_unmap = gk20a_locked_gmmu_unmap;
332 gops->mm.vm_remove = gk20a_vm_remove_support;
333 gops->mm.vm_alloc_share = gk20a_vm_alloc_share;
334 gops->mm.vm_bind_channel = gk20a_vm_bind_channel;
335 gops->mm.fb_flush = gk20a_mm_fb_flush;
336 gops->mm.l2_invalidate = gk20a_mm_l2_invalidate;
337 gops->mm.l2_flush = gk20a_mm_l2_flush;
338 gops->mm.tlb_invalidate = gk20a_mm_tlb_invalidate;
330} 339}