diff options
author | Nitin Kumbhar <nkumbhar@nvidia.com> | 2018-08-12 13:29:24 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-05 07:51:40 -0400 |
commit | 0406900ca944305f9713905f4d7363fc2d9cbbea (patch) | |
tree | bab057995860797dad2cbf7dd3d6e115117b3d1e /drivers/gpu/nvgpu/gm20b | |
parent | f16cc93d0a7c818327f08ece1d7fcbefcdbb055b (diff) |
gpu: nvgpu: move gm20b clk debugfs to linux
Use nvgpu_os_linux_ops to initialize gm20b debugfs
functions.
gm20b_clk_init_debugfs() will be invoked during initialization
from nvgpu_finalize_poweron_linux().
JIRA NVGPU-603
Change-Id: Ie89e427cc589ae14e1e7f5918d918126fb4afd77
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797905
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 11 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/clk_gm20b.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 3 |
3 files changed, 0 insertions, 17 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index 2ba677b0..03fed222 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c | |||
@@ -1490,17 +1490,6 @@ int gm20b_init_clk_support(struct gk20a *g) | |||
1490 | err = set_pll_freq(g, 1); | 1490 | err = set_pll_freq(g, 1); |
1491 | } | 1491 | } |
1492 | nvgpu_mutex_release(&clk->clk_mutex); | 1492 | nvgpu_mutex_release(&clk->clk_mutex); |
1493 | if (err) { | ||
1494 | return err; | ||
1495 | } | ||
1496 | |||
1497 | if (!clk->debugfs_set && g->ops.clk.init_debugfs) { | ||
1498 | err = g->ops.clk.init_debugfs(g); | ||
1499 | if (err) { | ||
1500 | return err; | ||
1501 | } | ||
1502 | clk->debugfs_set = true; | ||
1503 | } | ||
1504 | 1493 | ||
1505 | return err; | 1494 | return err; |
1506 | } | 1495 | } |
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.h b/drivers/gpu/nvgpu/gm20b/clk_gm20b.h index c93d4ee3..09b1bdcc 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.h | |||
@@ -70,9 +70,6 @@ int gm20b_gpcclk_set_rate(struct clk_gk20a *clk, unsigned long rate, | |||
70 | long gm20b_round_rate(struct clk_gk20a *clk, unsigned long rate, | 70 | long gm20b_round_rate(struct clk_gk20a *clk, unsigned long rate, |
71 | unsigned long *parent_rate); | 71 | unsigned long *parent_rate); |
72 | struct pll_parms *gm20b_get_gpc_pll_parms(void); | 72 | struct pll_parms *gm20b_get_gpc_pll_parms(void); |
73 | #ifdef CONFIG_DEBUG_FS | ||
74 | int gm20b_clk_init_debugfs(struct gk20a *g); | ||
75 | #endif | ||
76 | 73 | ||
77 | int gm20b_clk_pll_reg_write(struct gk20a *g, u32 reg, u32 val); | 74 | int gm20b_clk_pll_reg_write(struct gk20a *g, u32 reg, u32 val); |
78 | int gm20b_init_clk_support(struct gk20a *g); | 75 | int gm20b_init_clk_support(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 51ddb561..512da9df 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -555,9 +555,6 @@ static const struct gpu_ops gm20b_ops = { | |||
555 | .clk = { | 555 | .clk = { |
556 | .init_clk_support = gm20b_init_clk_support, | 556 | .init_clk_support = gm20b_init_clk_support, |
557 | .suspend_clk_support = gm20b_suspend_clk_support, | 557 | .suspend_clk_support = gm20b_suspend_clk_support, |
558 | #ifdef CONFIG_DEBUG_FS | ||
559 | .init_debugfs = gm20b_clk_init_debugfs, | ||
560 | #endif | ||
561 | .get_voltage = gm20b_clk_get_voltage, | 558 | .get_voltage = gm20b_clk_get_voltage, |
562 | .get_gpcclk_clock_counter = gm20b_clk_get_gpcclk_clock_counter, | 559 | .get_gpcclk_clock_counter = gm20b_clk_get_gpcclk_clock_counter, |
563 | .pll_reg_write = gm20b_clk_pll_reg_write, | 560 | .pll_reg_write = gm20b_clk_pll_reg_write, |