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authorSunny He <suhe@nvidia.com>2017-07-28 21:36:52 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-02 17:43:25 -0400
commita15e110a9b790f55a5c6e257cfbf7f7235f5a334 (patch)
tree199209146e3e67927c13e2ece240de40f973e1ea /drivers/gpu/nvgpu/gm20b/regops_gm20b.h
parent43ae97000be786e4118d431637f05b1462e296c4 (diff)
gpu: nvgpu: Reorg regops HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the regops sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I7e2ccf158a8e7efa453a3326e86146660f18926f Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530135 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Tested-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/regops_gm20b.h')
-rw-r--r--drivers/gpu/nvgpu/gm20b/regops_gm20b.h18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/regops_gm20b.h b/drivers/gpu/nvgpu/gm20b/regops_gm20b.h
index f613668b..4a40184b 100644
--- a/drivers/gpu/nvgpu/gm20b/regops_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/regops_gm20b.h
@@ -2,7 +2,7 @@
2 * 2 *
3 * Tegra GK20A GPU Debugger Driver Register Ops 3 * Tegra GK20A GPU Debugger Driver Register Ops
4 * 4 *
5 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. 5 * Copyright (c) 2013-2017, NVIDIA CORPORATION. All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License, 8 * under the terms and conditions of the GNU General Public License,
@@ -19,6 +19,20 @@
19#ifndef __REGOPS_GM20B_H_ 19#ifndef __REGOPS_GM20B_H_
20#define __REGOPS_GM20B_H_ 20#define __REGOPS_GM20B_H_
21 21
22void gm20b_init_regops(struct gpu_ops *gops); 22struct dbg_session_gk20a;
23
24const struct regop_offset_range *gm20b_get_global_whitelist_ranges(void);
25int gm20b_get_global_whitelist_ranges_count(void);
26const struct regop_offset_range *gm20b_get_context_whitelist_ranges(void);
27int gm20b_get_context_whitelist_ranges_count(void);
28const u32 *gm20b_get_runcontrol_whitelist(void);
29int gm20b_get_runcontrol_whitelist_count(void);
30const struct regop_offset_range *gm20b_get_runcontrol_whitelist_ranges(void);
31int gm20b_get_runcontrol_whitelist_ranges_count(void);
32const u32 *gm20b_get_qctl_whitelist(void);
33int gm20b_get_qctl_whitelist_count(void);
34const struct regop_offset_range *gm20b_get_qctl_whitelist_ranges(void);
35int gm20b_get_qctl_whitelist_ranges_count(void);
36int gm20b_apply_smpc_war(struct dbg_session_gk20a *dbg_s);
23 37
24#endif /* __REGOPS_GM20B_H_ */ 38#endif /* __REGOPS_GM20B_H_ */