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authorMahantesh Kumbar <mkumbar@nvidia.com>2018-09-06 11:14:27 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-24 11:11:49 -0400
commit5d30a5cda37ca349b4d9cb7e1985c7a0849001b6 (patch)
tree89a37078480d7cec42d9a8c7bc869aae8bb28279 /drivers/gpu/nvgpu/gm20b/pmu_gm20b.h
parent7465926ccdcdad87c22c788fe04fc11961df53ba (diff)
gpu: nvgpu: ACR code refactor
-Created struct nvgpu_acr to hold acr module related member within single struct which are currently spread across multiple structs like nvgpu_pmu, pmu_ops & gk20a. -Created struct hs_flcn_bl struct to hold ACR HS bootloader specific members -Created struct hs_acr to hold ACR ucode specific members like bootloader data using struct hs_flcn_bl, acr type & falcon info on which ACR ucode need to run. -Created acr ops under struct nvgpu_acr to perform ACR specific operation, currently ACR ops were part PMU which caused to have always dependence on PMU even though ACR was not executing on PMU. -Added acr_remove_support ops which will be called as part of gk20a_remove_support() method, earlier acr cleanup was part of pmu remove_support method. -Created define for ACR types, -Ops acr_sw_init() function helps to set ACR properties statically for chip currently in execution & assign ops to point to needed functions as per chip. -Ops acr_sw_init execute at early as nvgpu_init_mm_support calls acr function to alloc blob space. -Created ops to fill bootloader descriptor & to patch WPR info to ACR uocde based on interfaces used to bootstrap ACR ucode. -Created function gm20b_bootstrap_hs_acr() function which is now common HAL for all chips to bootstrap ACR, earlier had 3 different function for gm20b/gp10b, gv11b & for all dgpu based on interface needed. -Removed duplicate code for falcon engine wherever common falcon code can be used. -Removed ACR code dependent on PMU & made changes to use from nvgpu_acr. JIRA NVGPU-1148 Change-Id: I39951d2fc9a0bb7ee6057e0fa06da78045d47590 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1813231 GVS: Gerrit_Virtual_Submit Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/pmu_gm20b.h')
-rw-r--r--drivers/gpu/nvgpu/gm20b/pmu_gm20b.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h
index f1b6cd93..37634783 100644
--- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.h
@@ -34,5 +34,7 @@ void gm20b_pmu_load_lsf(struct gk20a *g, u32 falcon_id, u32 flags);
34int gm20b_pmu_init_acr(struct gk20a *g); 34int gm20b_pmu_init_acr(struct gk20a *g);
35void gm20b_write_dmatrfbase(struct gk20a *g, u32 addr); 35void gm20b_write_dmatrfbase(struct gk20a *g, u32 addr);
36bool gm20b_pmu_is_debug_mode_en(struct gk20a *g); 36bool gm20b_pmu_is_debug_mode_en(struct gk20a *g);
37 37int gm20b_pmu_setup_hw_and_bl_bootstrap(struct gk20a *g,
38 struct hs_acr *acr_desc,
39 struct nvgpu_falcon_bl_info *bl_info);
38#endif /*NVGPU_GM20B_PMU_GM20B_H*/ 40#endif /*NVGPU_GM20B_PMU_GM20B_H*/